diff mbox series

[v3,05/10] RISC-V: Kconfig.socs: Add Renesas RZ/Five SoC kconfig option

Message ID 20220915181558.354737-6-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
State Superseded
Headers show
Series Add support for Renesas RZ/Five SoC | expand

Commit Message

Lad, Prabhakar Sept. 15, 2022, 6:15 p.m. UTC
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
(R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
of the Renesas drivers depend on this config option.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
v2->v3
* Included RB tag from Geert

v1->v2
* No Change
---
 arch/riscv/Kconfig.socs | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Conor Dooley Sept. 15, 2022, 8:58 p.m. UTC | #1
On 15/09/2022 19:15, Prabhakar wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
> of the Renesas drivers depend on this config option.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v2->v3
> * Included RB tag from Geert
> 
> v1->v2
> * No Change
> ---
>  arch/riscv/Kconfig.socs | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 69774bb362d6..91b7f38b77a8 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
> 
>  endif # SOC_CANAAN
> 
> +config ARCH_RENESAS
> +       bool
> +       select GPIOLIB
> +       select PINCTRL
> +       select SOC_BUS

Do you really need to select SOC_BUS?
Noone else does on RISC-V, hence my curiosity.

> +
> +config SOC_RENESAS_RZFIVE
> +       bool "Renesas RZ/Five SoC"
> +       select ARCH_R9A07G043
> +       select ARCH_RENESAS
> +       select RESET_CONTROLLER
> +       help
> +         This enables support for Renesas RZ/Five SoC.

:thinking: isn't this pretty much what we decided not to do?
And instead you would redefine ARCH_RENESAS in this file and
not use SOC_RENESAS* at all? Will save me having to purge the
the SOC symbol when I do the conversion.

Thanks,
Conor.

> +
>  endmenu # "SoC selection"
> --
> 2.25.1
>
Lad, Prabhakar Sept. 15, 2022, 10:18 p.m. UTC | #2
Hi Conor,

Thank you for the review.

On Thu, Sep 15, 2022 at 9:59 PM <Conor.Dooley@microchip.com> wrote:
>
> On 15/09/2022 19:15, Prabhakar wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
> > (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
> > of the Renesas drivers depend on this config option.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > v2->v3
> > * Included RB tag from Geert
> >
> > v1->v2
> > * No Change
> > ---
> >  arch/riscv/Kconfig.socs | 14 ++++++++++++++
> >  1 file changed, 14 insertions(+)
> >
> > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > index 69774bb362d6..91b7f38b77a8 100644
> > --- a/arch/riscv/Kconfig.socs
> > +++ b/arch/riscv/Kconfig.socs
> > @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
> >
> >  endif # SOC_CANAAN
> >
> > +config ARCH_RENESAS
> > +       bool
> > +       select GPIOLIB
> > +       select PINCTRL
> > +       select SOC_BUS
>
> Do you really need to select SOC_BUS?
> Noone else does on RISC-V, hence my curiosity.
>
Yes we do need SOC_BUS due to soc_device_register() call in [0].
Digging further I realized we can drop the above SOC_BUS as
SOC_RENESAS is selecting SOC_BUS [1]

[0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/renesas-soc.c?h=v6.0-rc5#n487
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/Kconfig?h=v6.0-rc5#n5

> > +
> > +config SOC_RENESAS_RZFIVE
> > +       bool "Renesas RZ/Five SoC"
> > +       select ARCH_R9A07G043
> > +       select ARCH_RENESAS
> > +       select RESET_CONTROLLER
> > +       help
> > +         This enables support for Renesas RZ/Five SoC.
>
> :thinking: isn't this pretty much what we decided not to do?
> And instead you would redefine ARCH_RENESAS in this file and
> not use SOC_RENESAS* at all? Will save me having to purge the
> the SOC symbol when I do the conversion.
>
I was under the impression we didn't come to a conclusion so kept the
patch as is. I'll just make ARCH_RENESAS visible as Geert suggested
something like below:

        config ARCH_RENESAS
            bool "Renesas RISC-V SoCs"
            select GPIOLIB
            select PINCTRL
            select RESET_CONTROLLER


Cheers,
Prabhakar
Conor Dooley Sept. 15, 2022, 10:25 p.m. UTC | #3
On 15/09/2022 23:18, Lad, Prabhakar wrote:
> Hi Conor,
> 
> Thank you for the review.
> 
> On Thu, Sep 15, 2022 at 9:59 PM <Conor.Dooley@microchip.com> wrote:
>>
>> On 15/09/2022 19:15, Prabhakar wrote:
>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>>
>>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>>
>>> Introduce SOC_RENESAS_RZFIVE config option to enable Renesas RZ/Five
>>> (R9A07G043) SoC, along side also add ARCH_RENESAS config option as most
>>> of the Renesas drivers depend on this config option.
>>>
>>> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>> ---
>>> v2->v3
>>> * Included RB tag from Geert
>>>
>>> v1->v2
>>> * No Change
>>> ---
>>>  arch/riscv/Kconfig.socs | 14 ++++++++++++++
>>>  1 file changed, 14 insertions(+)
>>>
>>> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
>>> index 69774bb362d6..91b7f38b77a8 100644
>>> --- a/arch/riscv/Kconfig.socs
>>> +++ b/arch/riscv/Kconfig.socs
>>> @@ -80,4 +80,18 @@ config SOC_CANAAN_K210_DTB_SOURCE
>>>
>>>  endif # SOC_CANAAN
>>>
>>> +config ARCH_RENESAS
>>> +       bool
>>> +       select GPIOLIB
>>> +       select PINCTRL
>>> +       select SOC_BUS
>>
>> Do you really need to select SOC_BUS?
>> Noone else does on RISC-V, hence my curiosity.
>>
> Yes we do need SOC_BUS due to soc_device_register() call in [0].
> Digging further I realized we can drop the above SOC_BUS as
> SOC_RENESAS is selecting SOC_BUS [1]
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/renesas-soc.c?h=v6.0-rc5#n487
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/soc/renesas/Kconfig?h=v6.0-rc5#n5
> 
>>> +
>>> +config SOC_RENESAS_RZFIVE
>>> +       bool "Renesas RZ/Five SoC"
>>> +       select ARCH_R9A07G043
>>> +       select ARCH_RENESAS
>>> +       select RESET_CONTROLLER
>>> +       help
>>> +         This enables support for Renesas RZ/Five SoC.
>>
>> :thinking: isn't this pretty much what we decided not to do?
>> And instead you would redefine ARCH_RENESAS in this file and
>> not use SOC_RENESAS* at all? Will save me having to purge the
>> the SOC symbol when I do the conversion.
>>
> I was under the impression we didn't come to a conclusion so kept the

Might've been a good idea if I did a summary as I finished..
I guess I'll post one to the list tomorrow if I remember.

> patch as is. I'll just make ARCH_RENESAS visible as Geert suggested
> something like below:
> 
>         config ARCH_RENESAS
>             bool "Renesas RISC-V SoCs"
>             select GPIOLIB
>             select PINCTRL
>             select RESET_CONTROLLER
> 
> 
> Cheers,
> Prabhakar
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 69774bb362d6..91b7f38b77a8 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -80,4 +80,18 @@  config SOC_CANAAN_K210_DTB_SOURCE
 
 endif # SOC_CANAAN
 
+config ARCH_RENESAS
+	bool
+	select GPIOLIB
+	select PINCTRL
+	select SOC_BUS
+
+config SOC_RENESAS_RZFIVE
+	bool "Renesas RZ/Five SoC"
+	select ARCH_R9A07G043
+	select ARCH_RENESAS
+	select RESET_CONTROLLER
+	help
+	  This enables support for Renesas RZ/Five SoC.
+
 endmenu # "SoC selection"