| Message ID | 20221121221414.109965-4-conor@kernel.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | RISC-V: kconfig.socs cleanup, part 1 | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Guessing tree name failed |
On Mon, Nov 21, 2022 at 10:14:11PM +0000, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO > variants. The canaan DTs are an outlier in that they're gated at the > directory and the file level. Drop the directory level gating while we > are swapping the symbol names over. I still very much disagree with this. ARCH_FOO for something that is not a Linux architecture is a really really bad idea. We need to fix arm and not convert riscv, which got this right.
On Mon, 21 Nov 2022 22:04:21 PST (-0800), Christoph Hellwig wrote: > On Mon, Nov 21, 2022 at 10:14:11PM +0000, Conor Dooley wrote: >> From: Conor Dooley <conor.dooley@microchip.com> >> >> Convert all non user visible use of SOC_FOO symbols to their ARCH_FOO >> variants. The canaan DTs are an outlier in that they're gated at the >> directory and the file level. Drop the directory level gating while we >> are swapping the symbol names over. > > > I still very much disagree with this. ARCH_FOO for something that > is not a Linux architecture is a really really bad idea. We need to > fix arm and not convert riscv, which got this right. Makes sense, though I guess I'd argue that SOC is also a wrong name (but at least it doesn't conflict with the ARCH_* symbols that already exist). That'll touch a bunch of trees, adding the Arm folks to see if they're on board. I don't care a ton either way, my only opinion here is that RISC-V and Arm should use the same scheme. If the Arm folks want to move over to SOC_* that works for me, and has the advantage of being no work on my end ;)
diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 0d13b597cb55..46a520c1273c 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -131,7 +131,7 @@ endif endif ifneq ($(CONFIG_XIP_KERNEL),y) -ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_SOC_CANAAN),yy) +ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy) KBUILD_IMAGE := $(boot)/loader.bin else ifeq ($(CONFIG_EFI_ZBOOT),) diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile index b0ff5fbabb0c..0c97d673b775 100644 --- a/arch/riscv/boot/dts/Makefile +++ b/arch/riscv/boot/dts/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 subdir-y += sifive subdir-y += starfive -subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan +subdir-y += canaan subdir-y += microchip subdir-y += renesas diff --git a/arch/riscv/boot/dts/canaan/Makefile b/arch/riscv/boot/dts/canaan/Makefile index befe4eb7527b..520623264c87 100644 --- a/arch/riscv/boot/dts/canaan/Makefile +++ b/arch/riscv/boot/dts/canaan/Makefile @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_CANAAN) += canaan_kd233.dtb -dtb-$(CONFIG_SOC_CANAAN) += k210_generic.dtb -dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_bit.dtb -dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_dock.dtb -dtb-$(CONFIG_SOC_CANAAN) += sipeed_maix_go.dtb -dtb-$(CONFIG_SOC_CANAAN) += sipeed_maixduino.dtb +dtb-$(CONFIG_ARCH_CANAAN) += canaan_kd233.dtb +dtb-$(CONFIG_ARCH_CANAAN) += k210_generic.dtb +dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_bit.dtb +dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_dock.dtb +dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maix_go.dtb +dtb-$(CONFIG_ARCH_CANAAN) += sipeed_maixduino.dtb -obj-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_SOC_CANAAN_K210_DTB_SOURCE)) +obj-$(CONFIG_ARCH_CANAAN_K210_DTB_BUILTIN) += $(addsuffix .dtb.o, $(CONFIG_ARCH_CANAAN_K210_DTB_SOURCE)) diff --git a/arch/riscv/boot/dts/microchip/Makefile b/arch/riscv/boot/dts/microchip/Makefile index 7427a20934f3..259c3c802cab 100644 --- a/arch/riscv/boot/dts/microchip/Makefile +++ b/arch/riscv/boot/dts/microchip/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb -dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb -dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb -dtb-$(CONFIG_SOC_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-icicle-kit.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-m100pfsevp.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-polarberry.dtb +dtb-$(CONFIG_ARCH_MICROCHIP_POLARFIRE) += mpfs-sev-kit.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) diff --git a/arch/riscv/boot/dts/sifive/Makefile b/arch/riscv/boot/dts/sifive/Makefile index d90e4eb0ade8..6a5fbd4ed96a 100644 --- a/arch/riscv/boot/dts/sifive/Makefile +++ b/arch/riscv/boot/dts/sifive/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_SIFIVE) += hifive-unleashed-a00.dtb \ - hifive-unmatched-a00.dtb +dtb-$(CONFIG_ARCH_SIFIVE) += hifive-unleashed-a00.dtb \ + hifive-unmatched-a00.dtb obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .o, $(dtb-y)) diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 039c143cba33..7b00a48580ca 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_SOC_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb +dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb jh7100-starfive-visionfive-v1.dtb