| Message ID | 20221220011247.35560-5-hal.feng@starfivetech.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | Basic device tree support for StarFive JH7110 RISC-V SoC | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Guessing tree name failed |
On Tue, 20 Dec 2022 09:12:44 +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > This cache controller is also used on the StarFive JH7110 SoC. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../devicetree/bindings/riscv/sifive,ccache0.yaml | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml index bf3f07421f7e..31d20efaa6d3 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml @@ -38,6 +38,10 @@ properties: - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache - const: cache + - items: + - const: starfive,jh7110-ccache + - const: sifive,ccache0 + - const: cache - items: - const: microchip,mpfs-ccache - const: sifive,fu540-c000-ccache @@ -85,6 +89,7 @@ allOf: contains: enum: - sifive,fu740-c000-ccache + - starfive,jh7110-ccache - microchip,mpfs-ccache then: @@ -105,7 +110,9 @@ allOf: properties: compatible: contains: - const: sifive,fu740-c000-ccache + enum: + - sifive,fu740-c000-ccache + - starfive,jh7110-ccache then: properties: