From patchwork Thu Dec 22 11:46:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 13079783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6DA1C4332F for ; Thu, 22 Dec 2022 12:29:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=C3PxH7sVfVRM5NULCEnSukogtekm7S9a75VMsKb8mcQ=; b=nn/jHMPWvpGHAE qXZSHXp2IMZVXT+vgwu+8GwTP6qttz/5219KvMkhwZr/vxFYUVXX+wbmiiwGs7W9xxG6IrIp/hXit 91/uShqma3ne2Uw1CnjiosjTHiFtGM1G7CPiBJIeFKDngf9tUdE5wOhMJL0SEsLTq2haEFG1Kivgr 92bb2GDwzEermZOzcgehBknBFPgdfaUbt2UPlRgI0BktY0jk5YDaKrlL/hIFjctIzFjty8jsWroBu ceiWq7MkNy2ptmQGr5U/tAFlTwuUw1l/c8FqnuIbHS3Q71Vdsb1ZmWqIykuYvNJoNPqLLA6XAJLZ9 Cn//N437UoO55fvalP9A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p8Kgr-00BrNc-Sm; Thu, 22 Dec 2022 12:28:50 +0000 Received: from mga04.intel.com ([192.55.52.120]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p8K4M-00BWfl-9E; Thu, 22 Dec 2022 11:49:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671709742; x=1703245742; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hqPNEu1dGLHX4INM1uJ+E07/4aKzMUY3q5RTm6bJ5ag=; b=TcqnBk8Zm/qW5HFRAoqoa9MI73nlnxHOXmF2UWSbEsy/7kA0Mmw+gxV6 odrC/e8IMJn59HwhmMO5XM7ygP28QW7DrBbYolI5FcOsSuZQmNJSU2AF+ NUu1FAYelEwlWQZvzNgtuZHo8ackd4DCCpyqaZI38iQ8HFeU0nSbx6x84 qyBpGOCgMoUDwYl1Uzfx9SkKov44vQHfLVArwr4H7wEAnjrrD6eXQTxY+ en7R67V4dRY9YacqcXCo2V6bdC18iOvWBQh8Z4k/IMpd7o2e6sDSaC2F1 /Uzd6EIwpu7qcEEjH7jEe935Qe7sHXIgIL33oCXKdMPzQTCc+it/KMA6+ Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10568"; a="318804885" X-IronPort-AV: E=Sophos;i="5.96,265,1665471600"; d="scan'208";a="318804885" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Dec 2022 03:49:00 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10568"; a="629504902" X-IronPort-AV: E=Sophos;i="5.96,265,1665471600"; d="scan'208";a="629504902" Received: from lab-ah.igk.intel.com ([10.91.215.196]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Dec 2022 03:48:54 -0800 From: Andrzej Hajda To: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, loongarch@lists.linux.dev, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-xtensa@linux-xtensa.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Andrzej Hajda , Arnd Bergmann , Rodrigo Vivi , Andrew Morton , Andy Shevchenko , Peter Zijlstra , Boqun Feng , Mark Rutland Subject: [PATCH 16/19] arch/sparc: rename internal name __xchg to __arch_xchg Date: Thu, 22 Dec 2022 12:46:32 +0100 Message-Id: <20221222114635.1251934-17-andrzej.hajda@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222114635.1251934-1-andrzej.hajda@intel.com> References: <20221222114635.1251934-1-andrzej.hajda@intel.com> MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221222_034902_537694_B36F9839 X-CRM114-Status: GOOD ( 10.29 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org __xchg will be used for non-atomic xchg macro. Signed-off-by: Andrzej Hajda --- arch/sparc/include/asm/cmpxchg_32.h | 4 ++-- arch/sparc/include/asm/cmpxchg_64.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/sparc/include/asm/cmpxchg_32.h b/arch/sparc/include/asm/cmpxchg_32.h index 27a57a3a7597eb..7a1339533d1d7e 100644 --- a/arch/sparc/include/asm/cmpxchg_32.h +++ b/arch/sparc/include/asm/cmpxchg_32.h @@ -15,7 +15,7 @@ unsigned long __xchg_u32(volatile u32 *m, u32 new); void __xchg_called_with_bad_pointer(void); -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) +static inline unsigned long __arch_xchg(unsigned long x, __volatile__ void * ptr, int size) { switch (size) { case 4: @@ -25,7 +25,7 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int return x; } -#define arch_xchg(ptr,x) ({(__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)));}) +#define arch_xchg(ptr,x) ({(__typeof__(*(ptr)))__arch_xchg((unsigned long)(x),(ptr),sizeof(*(ptr)));}) /* Emulate cmpxchg() the same way we emulate atomics, * by hashing the object address and indexing into an array diff --git a/arch/sparc/include/asm/cmpxchg_64.h b/arch/sparc/include/asm/cmpxchg_64.h index 12d00a42c0a3ed..4c22fd9110c945 100644 --- a/arch/sparc/include/asm/cmpxchg_64.h +++ b/arch/sparc/include/asm/cmpxchg_64.h @@ -55,7 +55,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long #define arch_xchg(ptr,x) \ ({ __typeof__(*(ptr)) __ret; \ __ret = (__typeof__(*(ptr))) \ - __xchg((unsigned long)(x), (ptr), sizeof(*(ptr))); \ + __arch_xchg((unsigned long)(x), (ptr), sizeof(*(ptr))); \ __ret; \ }) @@ -87,7 +87,7 @@ xchg16(__volatile__ unsigned short *m, unsigned short val) return (load32 & mask) >> bit_shift; } -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, +static inline unsigned long __arch_xchg(unsigned long x, __volatile__ void * ptr, int size) { switch (size) {