Message ID | 20230111171027.2392-4-jszhang@kernel.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | riscv: improve boot time isa extensions handling | expand |
Context | Check | Description |
---|---|---|
conchuod/patch_count | success | Link |
conchuod/cover_letter | success | Series has a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 13 and now 13 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/alphanumeric_selects | success | Out of order selects before the patch: 57 and now 57 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/build_warn_rv64 | success | Errors and warnings before: 2054 this patch: 2054 |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 4 this patch: 4 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 9 lines checked |
conchuod/source_inline | success | Was 0 now: 0 |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Thu, Jan 12, 2023 at 01:10:17AM +0800, Jisheng Zhang wrote: > Currently riscv_cpufeature_patch_func() does nothing at the > RISCV_ALTERNATIVES_EARLY_BOOT stage. Add a check to detect whether we > are in this stage and exit early. This will allow us to use > riscv_cpufeature_patch_func() for scanning of all ISA extensions. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > Reviewed-by: Heiko Stuebner <heiko@sntech.de> Probably overkill at this stage, but: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> BTW, would you mind CCing me on all patches in a series if I have previously reviewed the series? Makes life easier :) > --- > arch/riscv/kernel/cpufeature.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 421b3d9578cc..37e8c5e69754 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -328,6 +328,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, > struct alt_entry *alt; > u32 tmp; > > + if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) > + return; > + > for (alt = begin; alt < end; alt++) { > if (alt->vendor_id != 0) > continue; > -- > 2.38.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 421b3d9578cc..37e8c5e69754 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -328,6 +328,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, struct alt_entry *alt; u32 tmp; + if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) + return; + for (alt = begin; alt < end; alt++) { if (alt->vendor_id != 0) continue;