From patchwork Tue Feb 21 14:04:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Walker Chen X-Patchwork-Id: 13147980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 998D1C636D7 for ; Tue, 21 Feb 2023 14:05:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4BWlLFUtxPFEEzRuAMjI0c9h4qGHNZBJwsUgX8J0fjU=; b=aCDQG/GNEOnQs/ +fM0WOhSBa16l96E1gfm6K109M2t9nWj0/9azEyoTrIv8klGOJzNTbfv8JuGEkedwMVUEW0qtOTOO 22/ORSfbnDaDvswV65sFTWQyO5YHGMhjfWmKuoNuZXFOeu25O3dY2hewVElBrrHKx7tvuP9bIES8k ul9Sq8r4h55STukBBADXsJIx2U2u3e/qciseR2X6bI6D7l6P0LTB3Ggcc1y8ca5KMFBOVYGW6bDiD +LL6++Zra7WZ+p8nrK1VvDS2wL66UzJ6C/NEQHEeYcG8NeOR9vSdgssNyXQ3pfqVEBcLczOLlcyVZ 6oMiDf6omcTAz9tGRycA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUTGq-008QZY-Ta; Tue, 21 Feb 2023 14:05:28 +0000 Received: from ex01.ufhost.com ([61.152.239.75]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pUTGj-008QP7-Oi for linux-riscv@lists.infradead.org; Tue, 21 Feb 2023 14:05:25 +0000 Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 9D88624E1C7; Tue, 21 Feb 2023 22:04:36 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 21 Feb 2023 22:04:36 +0800 Received: from localhost.localdomain (183.27.98.67) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 21 Feb 2023 22:04:35 +0800 From: Walker Chen To: Eugeniy Paltsev , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Palmer Dabbelt" , Emil Renner Berthing , "Emil Renner Berthing" CC: , , , Subject: [PATCH v2 2/3] dmaengine: dw-axi-dmac: Add support for StarFive JH7110 DMA Date: Tue, 21 Feb 2023 22:04:23 +0800 Message-ID: <20230221140424.719-3-walker.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230221140424.719-1-walker.chen@starfivetech.com> References: <20230221140424.719-1-walker.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [183.27.98.67] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230221_060522_133217_91EF9CFA X-CRM114-Status: GOOD ( 19.09 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add DMA reset operation in device probe and use different configuration on CH_CFG registers according to compatible string. Signed-off-by: Walker Chen Reviewed-by: Emil Renner Berthing --- .../dma/dw-axi-dmac/dw-axi-dmac-platform.c | 19 +++++++++++++++++-- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 3 +++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c index bf85aa0979ec..858c4337650f 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -86,7 +87,8 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan, cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS | config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS); - if (chan->chip->dw->hdata->reg_map_8_channels) { + if (chan->chip->dw->hdata->reg_map_8_channels && + !chan->chip->dw->hdata->use_cfg2) { cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS | config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS | config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS | @@ -1142,7 +1144,7 @@ static int dma_chan_terminate_all(struct dma_chan *dchan) axi_chan_disable(chan); ret = readl_poll_timeout_atomic(chan->chip->regs + DMAC_CHEN, val, - !(val & chan_active), 1000, 10000); + !(val & chan_active), 1000, DMAC_TIMEOUT_US); if (ret == -ETIMEDOUT) dev_warn(dchan2dev(dchan), "%s failed to stop\n", axi_chan_name(chan)); @@ -1416,6 +1418,18 @@ static int dw_probe(struct platform_device *pdev) if (IS_ERR(chip->cfgr_clk)) return PTR_ERR(chip->cfgr_clk); + if (of_device_is_compatible(node, "starfive,jh7110-axi-dma")) { + chip->resets = devm_reset_control_array_get_exclusive(&pdev->dev); + if (IS_ERR(chip->resets)) + return PTR_ERR(chip->resets); + + ret = reset_control_deassert(chip->resets); + if (ret) + return ret; + + chip->dw->hdata->use_cfg2 = true; + } + ret = parse_device_properties(chip); if (ret) return ret; @@ -1560,6 +1574,7 @@ static const struct dev_pm_ops dw_axi_dma_pm_ops = { static const struct of_device_id dw_dma_of_id_table[] = { { .compatible = "snps,axi-dma-1.01a" }, { .compatible = "intel,kmb-axi-dma" }, + { .compatible = "starfive,jh7110-axi-dma" }, {} }; MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h index e9d5eb0fd594..761d95691c02 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -21,6 +21,7 @@ #define DMAC_MAX_CHANNELS 16 #define DMAC_MAX_MASTERS 2 #define DMAC_MAX_BLK_SIZE 0x200000 +#define DMAC_TIMEOUT_US 200000 struct dw_axi_dma_hcfg { u32 nr_channels; @@ -33,6 +34,7 @@ struct dw_axi_dma_hcfg { /* Register map for DMAX_NUM_CHANNELS <= 8 */ bool reg_map_8_channels; bool restrict_axi_burst_len; + bool use_cfg2; }; struct axi_dma_chan { @@ -70,6 +72,7 @@ struct axi_dma_chip { struct clk *core_clk; struct clk *cfgr_clk; struct dw_axi_dma *dw; + struct reset_control *resets; }; /* LLI == Linked List Item */