From patchwork Fri Mar 3 13:36:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13158813 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B3FCC64EC4 for ; Fri, 3 Mar 2023 13:38:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AXHof4UErTl5niH8W5U6tUB7zUVldA7IneLC9T6v70Q=; b=snXZOFsAUijxJy J55wbGHJ6+awfAbcsaJt6/3t2M8Hv/HVSGbBjZaCBRAXzA/nAG/V5uLnv3+Mt3r+Q62mLGbp6Eeth zijg4BioT/GguYDqSONjX4C0Db/kzVBUwdvNZWpFOOCZxhgxRzINcg681XyEgBIm8g4febA3a0iqS r8c3NaaPaSPRkrxgYvIZf95fuclgefDD2CN72X0TfTyLMwabfXSdqDXYIw2umBkOFf4vRqITfjOGG uUzGr3ERrejSDFtubi4PPCLuilVbbY1Mgzjj9jOUYTmaAFRDOqcut96ZAMTLqLwBZRQ+mHhBQQy86 zObs+8upMiEMfwgr9E4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pY5bv-006TkR-Tr; Fri, 03 Mar 2023 13:38:11 +0000 Received: from mail-pj1-x102b.google.com ([2607:f8b0:4864:20::102b]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pY5bt-006Th6-9W for linux-riscv@lists.infradead.org; Fri, 03 Mar 2023 13:38:10 +0000 Received: by mail-pj1-x102b.google.com with SMTP id h17-20020a17090aea9100b0023739b10792so2291285pjz.1 for ; Fri, 03 Mar 2023 05:38:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1677850687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7z6bEMhbWIxvIOeCxyJDoCOcsyBkr0Sn2VEh+xkIGVw=; b=L1+t7UFo1QNj1oAdW0bFVzjj23x0mZi3y5JmnPZsUX3cRp4O2HYqqoIiqSJh/jUA9s 1LZjAG67fu8riiuEWb8IPvAPcZhyM8aLEYMJmsVpbR0Xf1unTVMYawU57exAs88x7wEC V0cOUV2H2AXo7WUmlHqe/z1V19da76imaxJzIc09gXUnHPmTGi5EoJXgUjYZX1g20vxg Q6dM6OtoILQk4Z0gbXAKAzEVDpTnk3isgcKuK/TM0r4uGEkMF4+aaySbIOHvhJT5UGKp kyWuaJrVl45sT7LTPbNy6tZgQH1JFMxPSA5VSo7eeXckRrPoAEUr9SOGRqh06eIKSf3R 967w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1677850687; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7z6bEMhbWIxvIOeCxyJDoCOcsyBkr0Sn2VEh+xkIGVw=; b=f41JtOyNVKRBQw4BnZbiYDgJb8RFjsJ9XdMnBdATG4TewcF9Nnp2ef4qtufN3AzF+v cwCuhc3J+xHkXqe2/FJvYufsx8erL2Wutd/34NZP0BUTTcQxAC4KbNWFUmk8WRnBVgRm zULCLQPyJjkPJxPaL/Yd6MbBLCrwSTBW5Q6VNN0POmfK4jqbMx+WUsaaIfKp8UO6V3Ie G3RaBB+Y8BUqwqWHSr0O7Q0NHiiieOi4rnjyy6d1vcU0tsXp7PxU6MsGOlsl34gBb+Vf 8/oG5Rp9Dg0/mpl1Z92Q1hXfLBx3niFUpsPcKdUXhoAuhUsgb1m02d2jCnN45Jj5wF5S lXRw== X-Gm-Message-State: AO0yUKUE0O2Q+a3jhcq/mRqY9JG4onMORbPs2tDY3OHwhdeFV0+xCOSe z/9VNFC6Or5/CQodw9WBsDHp5B87vlKdmeFM X-Google-Smtp-Source: AK7set8HY1JLUjvvIQsbWxPgzC8f1GqAQb6N6LHxvpffS0WsD5DRd0buUtZ1Y+oEPF5JYlN9dQiMHw== X-Received: by 2002:a17:902:da90:b0:19a:a0d0:10f0 with SMTP id j16-20020a170902da9000b0019aa0d010f0mr2416786plx.23.1677850687560; Fri, 03 Mar 2023 05:38:07 -0800 (PST) Received: from localhost.localdomain ([49.206.14.226]) by smtp.gmail.com with ESMTPSA id m9-20020a170902768900b0019ac5d3ee9dsm1533125pll.157.2023.03.03.05.38.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 05:38:07 -0800 (PST) From: Sunil V L To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH V3 15/20] clocksource/timer-riscv: Refactor riscv_timer_init_dt() Date: Fri, 3 Mar 2023 19:06:42 +0530 Message-Id: <20230303133647.845095-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com> References: <20230303133647.845095-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230303_053809_370311_D2326584 X-CRM114-Status: GOOD ( 14.07 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Jonathan Corbet , Albert Ou , "Rafael J . Wysocki" , "Rafael J . Wysocki" , Marc Zyngier , Daniel Lezcano , Atish Patra , 'Conor Dooley ' , Palmer Dabbelt , Thomas Gleixner , Andrew Jones , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Refactor the timer init function such that few things can be shared by both DT and ACPI based platforms. Co-developed-by: Anup Patel Signed-off-by: Anup Patel Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley --- drivers/clocksource/timer-riscv.c | 81 +++++++++++++++---------------- 1 file changed, 40 insertions(+), 41 deletions(-) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 5f0f10c7e222..cecc4662293b 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -124,61 +124,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int __init riscv_timer_init_dt(struct device_node *n) +static int __init riscv_timer_init_common(void) { - int cpuid, error; - unsigned long hartid; - struct device_node *child; + int error; struct irq_domain *domain; + struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode(); - error = riscv_of_processor_hartid(n, &hartid); - if (error < 0) { - pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n", - n, hartid); - return error; - } - - cpuid = riscv_hartid_to_cpuid(hartid); - if (cpuid < 0) { - pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); - return cpuid; - } - - if (cpuid != smp_processor_id()) - return 0; - - child = of_find_compatible_node(NULL, NULL, "riscv,timer"); - if (child) { - riscv_timer_cannot_wake_cpu = of_property_read_bool(child, - "riscv,timer-cannot-wake-cpu"); - of_node_put(child); - } - - domain = NULL; - child = of_get_compatible_child(n, "riscv,cpu-intc"); - if (!child) { - pr_err("Failed to find INTC node [%pOF]\n", n); - return -ENODEV; - } - domain = irq_find_host(child); - of_node_put(child); + domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY); if (!domain) { - pr_err("Failed to find IRQ domain for node [%pOF]\n", n); + pr_err("Failed to find irq_domain for INTC node [%pfwP]\n", + intc_fwnode); return -ENODEV; } riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER); if (!riscv_clock_event_irq) { - pr_err("Failed to map timer interrupt for node [%pOF]\n", n); + pr_err("Failed to map timer interrupt for node [%pfwP]\n", intc_fwnode); return -ENODEV; } - pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n", - __func__, cpuid, hartid); error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); if (error) { - pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", - error, cpuid); + pr_err("RISCV timer registration failed [%d]\n", error); return error; } @@ -207,4 +174,36 @@ static int __init riscv_timer_init_dt(struct device_node *n) return error; } +static int __init riscv_timer_init_dt(struct device_node *n) +{ + int cpuid, error; + unsigned long hartid; + struct device_node *child; + + error = riscv_of_processor_hartid(n, &hartid); + if (error < 0) { + pr_warn("Invalid hartid for node [%pOF] error = [%lu]\n", + n, hartid); + return error; + } + + cpuid = riscv_hartid_to_cpuid(hartid); + if (cpuid < 0) { + pr_warn("Invalid cpuid for hartid [%lu]\n", hartid); + return cpuid; + } + + if (cpuid != smp_processor_id()) + return 0; + + child = of_find_compatible_node(NULL, NULL, "riscv,timer"); + if (child) { + riscv_timer_cannot_wake_cpu = of_property_read_bool(child, + "riscv,timer-cannot-wake-cpu"); + of_node_put(child); + } + + return riscv_timer_init_common(); +} + TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);