[V3,20/20] MAINTAINERS: Add entry for drivers/acpi/riscv

Message ID	20230303133647.845095-21-sunilvl@ventanamicro.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org> From: Sunil V L <sunilvl@ventanamicro.com> To: linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH V3 20/20] MAINTAINERS: Add entry for drivers/acpi/riscv Date: Fri, 3 Mar 2023 19:06:47 +0530 Message-Id: <20230303133647.845095-21-sunilvl@ventanamicro.com> In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com> References: <20230303133647.845095-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: list Cc: Anup Patel <apatel@ventanamicro.com>, Jonathan Corbet <corbet@lwn.net>, Albert Ou <aou@eecs.berkeley.edu>, "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>, "Rafael J . Wysocki" <rafael@kernel.org>, Marc Zyngier <maz@kernel.org>, Daniel Lezcano <daniel.lezcano@linaro.org>, Atish Patra <atishp@rivosinc.com>, 'Conor Dooley ' <conor.dooley@microchip.com>, Palmer Dabbelt <palmer@dabbelt.com>, Thomas Gleixner <tglx@linutronix.de>, Andrew Jones <ajones@ventanamicro.com>, Len Brown <lenb@kernel.org> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org
Series	Add basic ACPI support for RISC-V \| expand [V3,00/20] Add basic ACPI support for RISC-V [V3,01/20] riscv: move sbi_init() earlier before jump_label_init() [V3,02/20] ACPICA: MADT: Add RISC-V INTC interrupt controller [V3,03/20] ACPICA: Add structure definitions for RISC-V RHCT [V3,04/20] ACPI: tables: Print RINTC information when MADT is parsed [V3,05/20] ACPI: OSL: Make should_use_kmap() 0 for RISC-V [V3,06/20] RISC-V: Add support to build the ACPI core [V3,07/20] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid [V3,08/20] drivers/acpi: RISC-V: Add RHCT related code [V3,09/20] RISC-V: smpboot: Create wrapper smp_setup() [V3,10/20] RISC-V: smpboot: Add ACPI support in smp_setup() [V3,11/20] RISC-V: ACPI: Cache and retrieve the RINTC structure [V3,12/20] RISC-V: cpufeature: Add ACPI support in riscv_fill_hwcap() [V3,13/20] RISC-V: cpu: Enable cpuinfo for ACPI systems [V3,14/20] irqchip/riscv-intc: Add ACPI support [V3,15/20] clocksource/timer-riscv: Refactor riscv_timer_init_dt() [V3,16/20] clocksource/timer-riscv: Add ACPI support [V3,17/20] RISC-V: time.c: Add ACPI support for time_init() [V3,18/20] RISC-V: Add ACPI initialization in setup_arch() [V3,19/20] RISC-V: Enable ACPI in defconfig [V3,20/20] MAINTAINERS: Add entry for drivers/acpi/riscv

Message ID

20230303133647.845095-21-sunilvl@ventanamicro.com (mailing list archive)

State

Superseded

Headers

From: Sunil V L <sunilvl@ventanamicro.com>
To: linux-riscv@lists.infradead.org,
	linux-acpi@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-doc@vger.kernel.org
Subject: [PATCH V3 20/20] MAINTAINERS: Add entry for drivers/acpi/riscv
Date: Fri,  3 Mar 2023 19:06:47 +0530
Message-Id: <20230303133647.845095-21-sunilvl@ventanamicro.com>
In-Reply-To: <20230303133647.845095-1-sunilvl@ventanamicro.com>
References: <20230303133647.845095-1-sunilvl@ventanamicro.com>
MIME-Version: 1.0
Precedence: list
Cc: Anup Patel <apatel@ventanamicro.com>, Jonathan Corbet <corbet@lwn.net>,
 Albert Ou <aou@eecs.berkeley.edu>,
 "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
 "Rafael J . Wysocki" <rafael@kernel.org>, Marc Zyngier <maz@kernel.org>,
 Daniel Lezcano <daniel.lezcano@linaro.org>,
 Atish Patra <atishp@rivosinc.com>,
 'Conor Dooley ' <conor.dooley@microchip.com>,
 Palmer Dabbelt <palmer@dabbelt.com>, Thomas Gleixner <tglx@linutronix.de>,
 Andrew Jones <ajones@ventanamicro.com>, Len Brown <lenb@kernel.org>
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Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org>
Errors-To: 
 linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org

Series

Add basic ACPI support for RISC-V | expand

Context	Check	Description
conchuod/tree_selection	fail	Failed to apply to next/pending-fixes or riscv/for-next

Context

Check

Description

conchuod/tree_selection

fail

Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Sunil V L March 3, 2023, 1:36 p.m. UTC

ACPI defines few RISC-V specific tables which need
parsing code added in drivers/acpi/riscv. Add maintainer
entries for this newly created folder.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
 MAINTAINERS | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index b0db911207ba..c299f88cb212 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -406,6 +406,14 @@  L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 F:	drivers/acpi/arm64
 
+ACPI FOR RISC-V (ACPI/riscv)
+M:	Sunil V L <sunilvl@ventanamicro.com>
+L:	linux-acpi@vger.kernel.org
+L:	linux-riscv@lists.infradead.org
+S:	Maintained
+F:	arch/riscv/kernel/acpi.c
+F:	drivers/acpi/riscv
+
 ACPI SERIAL MULTI INSTANTIATE DRIVER
 M:	Hans de Goede <hdegoede@redhat.com>
 L:	platform-driver-x86@vger.kernel.org

[V3,20/20] MAINTAINERS: Add entry for drivers/acpi/riscv

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Patch