| Message ID | 20230303133647.845095-7-sunilvl@ventanamicro.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add basic ACPI support for RISC-V | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Failed to apply to next/pending-fixes or riscv/for-next |
On Fri, Mar 03, 2023 at 07:06:33PM +0530, Sunil V L wrote: > Enable ACPI core for RISC-V after adding architecture-specific > interfaces and header files required to build the ACPI core. > > 1) Couple of header files are required unconditionally by the ACPI > core. Add empty acenv.h and cpu.h header files. > > 2) If CONFIG_PCI is enabled, a few PCI related interfaces need to > be provided by the architecture. Define dummy interfaces for now > so that build succeeds. Actual implementation will be added when > PCI support is added for ACPI along with external interrupt > controller support. > > 3) A few globals and memory mapping related functions specific > to the architecture need to be provided. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > --- > arch/riscv/Kconfig | 5 +++ > arch/riscv/include/asm/acenv.h | 11 +++++ > arch/riscv/include/asm/acpi.h | 61 ++++++++++++++++++++++++++ > arch/riscv/include/asm/cpu.h | 8 ++++ > arch/riscv/kernel/Makefile | 2 + > arch/riscv/kernel/acpi.c | 80 ++++++++++++++++++++++++++++++++++ > 6 files changed, 167 insertions(+) > create mode 100644 arch/riscv/include/asm/acenv.h > create mode 100644 arch/riscv/include/asm/acpi.h > create mode 100644 arch/riscv/include/asm/cpu.h > create mode 100644 arch/riscv/kernel/acpi.c > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 71754eb32ee6..f3108c7e19d8 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -12,6 +12,8 @@ config 32BIT > > config RISCV > def_bool y > + select ACPI_GENERIC_GSI if ACPI > + select ACPI_REDUCED_HARDWARE_ONLY if ACPI > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE > @@ -617,6 +619,7 @@ config EFI > depends on OF && !XIP_KERNEL > depends on MMU > default y > + select ARCH_SUPPORTS_ACPI if 64BIT > select EFI_GENERIC_STUB > select EFI_PARAMS_FROM_FDT > select EFI_RUNTIME_WRAPPERS > @@ -720,3 +723,5 @@ source "drivers/cpufreq/Kconfig" > endmenu # "CPU Power Management" > > source "arch/riscv/kvm/Kconfig" > + > +source "drivers/acpi/Kconfig" The above Kconfig hunks don't apply on the IPI improvement base. The second hunk also looks weird with the select under the default. Thanks, drew
On Fri, Mar 03, 2023 at 04:36:17PM +0100, Andrew Jones wrote: > On Fri, Mar 03, 2023 at 07:06:33PM +0530, Sunil V L wrote: > > Enable ACPI core for RISC-V after adding architecture-specific > > interfaces and header files required to build the ACPI core. > > > > 1) Couple of header files are required unconditionally by the ACPI > > core. Add empty acenv.h and cpu.h header files. > > > > 2) If CONFIG_PCI is enabled, a few PCI related interfaces need to > > be provided by the architecture. Define dummy interfaces for now > > so that build succeeds. Actual implementation will be added when > > PCI support is added for ACPI along with external interrupt > > controller support. > > > > 3) A few globals and memory mapping related functions specific > > to the architecture need to be provided. > > > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > --- > > arch/riscv/Kconfig | 5 +++ > > arch/riscv/include/asm/acenv.h | 11 +++++ > > arch/riscv/include/asm/acpi.h | 61 ++++++++++++++++++++++++++ > > arch/riscv/include/asm/cpu.h | 8 ++++ > > arch/riscv/kernel/Makefile | 2 + > > arch/riscv/kernel/acpi.c | 80 ++++++++++++++++++++++++++++++++++ > > 6 files changed, 167 insertions(+) > > create mode 100644 arch/riscv/include/asm/acenv.h > > create mode 100644 arch/riscv/include/asm/acpi.h > > create mode 100644 arch/riscv/include/asm/cpu.h > > create mode 100644 arch/riscv/kernel/acpi.c > > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > > index 71754eb32ee6..f3108c7e19d8 100644 > > --- a/arch/riscv/Kconfig > > +++ b/arch/riscv/Kconfig > > @@ -12,6 +12,8 @@ config 32BIT > > > > config RISCV > > def_bool y > > + select ACPI_GENERIC_GSI if ACPI > > + select ACPI_REDUCED_HARDWARE_ONLY if ACPI > > select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION > > select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 > > select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE > > @@ -617,6 +619,7 @@ config EFI > > depends on OF && !XIP_KERNEL > > depends on MMU > > default y > > + select ARCH_SUPPORTS_ACPI if 64BIT > > select EFI_GENERIC_STUB > > select EFI_PARAMS_FROM_FDT > > select EFI_RUNTIME_WRAPPERS > > @@ -720,3 +723,5 @@ source "drivers/cpufreq/Kconfig" > > endmenu # "CPU Power Management" > > > > source "arch/riscv/kvm/Kconfig" > > + > > +source "drivers/acpi/Kconfig" > > The above Kconfig hunks don't apply on the IPI improvement base. The > second hunk also looks weird with the select under the default. > Just following up here; as Sunil pointed out in chat, the base is latest master with the IPI improvement rebased. I was using the last IPI improvement branch. So that explains the problem I had applying this and the weirdness I was seeing with the Kconfig lines (select/default) as compared to v2. Thanks, drew
On Fri, Mar 03, 2023 at 07:06:33PM +0530, Sunil V L wrote: > Enable ACPI core for RISC-V after adding architecture-specific > interfaces and header files required to build the ACPI core. > > 1) Couple of header files are required unconditionally by the ACPI > core. Add empty acenv.h and cpu.h header files. > > 2) If CONFIG_PCI is enabled, a few PCI related interfaces need to > be provided by the architecture. Define dummy interfaces for now > so that build succeeds. Actual implementation will be added when > PCI support is added for ACPI along with external interrupt > controller support. > > 3) A few globals and memory mapping related functions specific > to the architecture need to be provided. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > diff --git a/arch/riscv/include/asm/acenv.h b/arch/riscv/include/asm/acenv.h > new file mode 100644 > index 000000000000..22123c5a4883 > --- /dev/null > +++ b/arch/riscv/include/asm/acenv.h > @@ -0,0 +1,11 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * RISC-V specific ACPICA environments and implementation > + */ > + > +#ifndef _ASM_ACENV_H > +#define _ASM_ACENV_H > + > +/* It is required unconditionally by ACPI core */ Think I pointed out on v1 that this comment doesn't really make any sense. s/It/This header/. > + > +#endif /* _ASM_ACENV_H */ > diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h > new file mode 100644 > index 000000000000..0b52a190f71a > --- /dev/null > +++ b/arch/riscv/include/asm/acpi.h > @@ -0,0 +1,61 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2013-2014, Linaro Ltd. > + * Author: Al Stone <al.stone@linaro.org> > + * Author: Graeme Gregory <graeme.gregory@linaro.org> > + * Author: Hanjun Guo <hanjun.guo@linaro.org> > + * > + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. > + * Author: Sunil V L <sunilvl@ventanamicro.com> > + */ > + > +#ifndef _ASM_ACPI_H > +#define _ASM_ACPI_H > + > +/* Basic configuration for ACPI */ > +#ifdef CONFIG_ACPI > + > +/* ACPI table mapping after acpi_permanent_mmap is set */ > +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); > +#define acpi_os_ioremap acpi_os_ioremap > + > +#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */ ^^^ Kinda weird whitespace here, my editor noticed and my OCD won't let it go unsaid :/ You used a tab before similar use comments later in this patch. > +extern int acpi_disabled; > +extern int acpi_noirq; > +extern int acpi_pci_disabled; > + > +static inline void disable_acpi(void) > +{ > + acpi_disabled = 1; > + acpi_pci_disabled = 1; > + acpi_noirq = 1; > +} > + > +static inline void enable_acpi(void) > +{ > + acpi_disabled = 0; > + acpi_pci_disabled = 0; > + acpi_noirq = 0; > +} > + > +/* > + * The ACPI processor driver for ACPI core code needs this macro > + * to find out this cpu was already mapped (mapping from CPU hardware ^ missing word "whether" > diff --git a/arch/riscv/include/asm/cpu.h b/arch/riscv/include/asm/cpu.h > new file mode 100644 > index 000000000000..ea1a88b3d5f2 > --- /dev/null > +++ b/arch/riscv/include/asm/cpu.h > @@ -0,0 +1,8 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#ifndef _ASM_CPU_H > +#define _ASM_CPU_H > + > +/* It is required unconditionally by ACPI core */ Same comment here, what is "it"? > + > +#endif /* _ASM_CPU_H */ > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index 67f542be1bea..f979dc8cf47d 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -90,3 +90,5 @@ obj-$(CONFIG_EFI) += efi.o > obj-$(CONFIG_COMPAT) += compat_syscall_table.o > obj-$(CONFIG_COMPAT) += compat_signal.o > obj-$(CONFIG_COMPAT) += compat_vdso/ > + > +obj-$(CONFIG_ACPI) += acpi.o This file appears to be tab aligned (at least the other lines in the diff are), so please tab align this one too. Those are all nitpick things though, so w/ 'em fixed: Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 71754eb32ee6..f3108c7e19d8 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -12,6 +12,8 @@ config 32BIT config RISCV def_bool y + select ACPI_GENERIC_GSI if ACPI + select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE @@ -617,6 +619,7 @@ config EFI depends on OF && !XIP_KERNEL depends on MMU default y + select ARCH_SUPPORTS_ACPI if 64BIT select EFI_GENERIC_STUB select EFI_PARAMS_FROM_FDT select EFI_RUNTIME_WRAPPERS @@ -720,3 +723,5 @@ source "drivers/cpufreq/Kconfig" endmenu # "CPU Power Management" source "arch/riscv/kvm/Kconfig" + +source "drivers/acpi/Kconfig" diff --git a/arch/riscv/include/asm/acenv.h b/arch/riscv/include/asm/acenv.h new file mode 100644 index 000000000000..22123c5a4883 --- /dev/null +++ b/arch/riscv/include/asm/acenv.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * RISC-V specific ACPICA environments and implementation + */ + +#ifndef _ASM_ACENV_H +#define _ASM_ACENV_H + +/* It is required unconditionally by ACPI core */ + +#endif /* _ASM_ACENV_H */ diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h new file mode 100644 index 000000000000..0b52a190f71a --- /dev/null +++ b/arch/riscv/include/asm/acpi.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone <al.stone@linaro.org> + * Author: Graeme Gregory <graeme.gregory@linaro.org> + * Author: Hanjun Guo <hanjun.guo@linaro.org> + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L <sunilvl@ventanamicro.com> + */ + +#ifndef _ASM_ACPI_H +#define _ASM_ACPI_H + +/* Basic configuration for ACPI */ +#ifdef CONFIG_ACPI + +/* ACPI table mapping after acpi_permanent_mmap is set */ +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); +#define acpi_os_ioremap acpi_os_ioremap + +#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */ +extern int acpi_disabled; +extern int acpi_noirq; +extern int acpi_pci_disabled; + +static inline void disable_acpi(void) +{ + acpi_disabled = 1; + acpi_pci_disabled = 1; + acpi_noirq = 1; +} + +static inline void enable_acpi(void) +{ + acpi_disabled = 0; + acpi_pci_disabled = 0; + acpi_noirq = 0; +} + +/* + * The ACPI processor driver for ACPI core code needs this macro + * to find out this cpu was already mapped (mapping from CPU hardware + * ID to CPU logical ID) or not. + */ +#define cpu_physical_id(cpu) cpuid_to_hartid_map(cpu) + +/* + * Since MADT must provide at least one RINTC structure, the + * CPU will be always available in MADT on RISC-V. + */ +static inline bool acpi_has_cpu_in_madt(void) +{ + return true; +} + +static inline void arch_fix_phys_package_id(int num, u32 slot) { } + +#endif /* CONFIG_ACPI */ + +#endif /*_ASM_ACPI_H*/ diff --git a/arch/riscv/include/asm/cpu.h b/arch/riscv/include/asm/cpu.h new file mode 100644 index 000000000000..ea1a88b3d5f2 --- /dev/null +++ b/arch/riscv/include/asm/cpu.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _ASM_CPU_H +#define _ASM_CPU_H + +/* It is required unconditionally by ACPI core */ + +#endif /* _ASM_CPU_H */ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 67f542be1bea..f979dc8cf47d 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -90,3 +90,5 @@ obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_COMPAT) += compat_syscall_table.o obj-$(CONFIG_COMPAT) += compat_signal.o obj-$(CONFIG_COMPAT) += compat_vdso/ + +obj-$(CONFIG_ACPI) += acpi.o diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c new file mode 100644 index 000000000000..81d448c41714 --- /dev/null +++ b/arch/riscv/kernel/acpi.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * RISC-V Specific Low-Level ACPI Boot Support + * + * Copyright (C) 2013-2014, Linaro Ltd. + * Author: Al Stone <al.stone@linaro.org> + * Author: Graeme Gregory <graeme.gregory@linaro.org> + * Author: Hanjun Guo <hanjun.guo@linaro.org> + * Author: Tomasz Nowicki <tomasz.nowicki@linaro.org> + * Author: Naresh Bhat <naresh.bhat@linaro.org> + * + * Copyright (C) 2021-2023, Ventana Micro Systems Inc. + * Author: Sunil V L <sunilvl@ventanamicro.com> + */ + +#include <linux/acpi.h> +#include <linux/io.h> +#include <linux/pci.h> + +int acpi_noirq = 1; /* skip ACPI IRQ initialization */ +int acpi_disabled = 1; +EXPORT_SYMBOL(acpi_disabled); + +int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ +EXPORT_SYMBOL(acpi_pci_disabled); + +/* + * __acpi_map_table() will be called before paging_init(), so early_ioremap() + * or early_memremap() should be called here to for ACPI table mapping. + */ +void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) +{ + if (!size) + return NULL; + + return early_memremap(phys, size); +} + +void __init __acpi_unmap_table(void __iomem *map, unsigned long size) +{ + if (!map || !size) + return; + + early_memunmap(map, size); +} + +void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) +{ + return memremap(phys, size, MEMREMAP_WB); +} + +#ifdef CONFIG_PCI + +/* + * These interfaces are defined just to enable building ACPI core. + * TODO: Update it with actual implementation when external interrupt + * controller support is added in RISC-V ACPI. + */ +int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 *val) +{ + return PCIBIOS_DEVICE_NOT_FOUND; +} + +int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 val) +{ + return PCIBIOS_DEVICE_NOT_FOUND; +} + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + return -1; +} + +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + return NULL; +} +#endif /* CONFIG_PCI */