Message ID | 20230310173217.3429788-14-amit.kumar-mahapatra@amd.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show
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Fri, 10 Mar 2023 11:39:09 -0600 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB07.amd.com (10.181.41.45) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Fri, 10 Mar 2023 09:39:08 -0800 Received: from xhdsneeli40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Fri, 10 Mar 2023 11:38:41 -0600 From: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> To: <broonie@kernel.org>, <miquel.raynal@bootlin.com>, <richard@nod.at>, <vigneshr@ti.com>, <jic23@kernel.org>, <tudor.ambarus@microchip.com>, <pratyush@kernel.org>, <Sanju.Mehta@amd.com>, <chin-ting_kuo@aspeedtech.com>, <clg@kaod.org>, <kdasu.kdev@gmail.com>, <f.fainelli@gmail.com>, <rjui@broadcom.com>, <sbranden@broadcom.com>, <eajames@linux.ibm.com>, <olteanv@gmail.com>, <han.xu@nxp.com>, <john.garry@huawei.com>, <shawnguo@kernel.org>, <s.hauer@pengutronix.de>, <narmstrong@baylibre.com>, <khilman@baylibre.com>, <matthias.bgg@gmail.com>, <haibo.chen@nxp.com>, <linus.walleij@linaro.org>, <daniel@zonque.org>, <haojian.zhuang@gmail.com>, <robert.jarzmik@free.fr>, <agross@kernel.org>, <bjorn.andersson@linaro.org>, <heiko@sntech.de>, <krzysztof.kozlowski@linaro.org>, <andi@etezian.org>, <mcoquelin.stm32@gmail.com>, <alexandre.torgue@foss.st.com>, <wens@csie.org>, <jernej.skrabec@gmail.com>, <samuel@sholland.org>, <masahisa.kojima@linaro.org>, <jaswinder.singh@linaro.org>, <rostedt@goodmis.org>, <mingo@redhat.com>, <l.stelmach@samsung.com>, <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <alex.aring@gmail.com>, <stefan@datenfreihafen.org>, <kvalo@kernel.org>, <james.schulman@cirrus.com>, <david.rhodes@cirrus.com>, <tanureal@opensource.cirrus.com>, <rf@opensource.cirrus.com>, <perex@perex.cz>, <tiwai@suse.com>, <npiggin@gmail.com>, <christophe.leroy@csgroup.eu>, <mpe@ellerman.id.au>, <oss@buserror.net>, <windhl@126.com>, <yangyingliang@huawei.com>, <william.zhang@broadcom.com>, <kursad.oney@broadcom.com>, <jonas.gorski@gmail.com>, <anand.gore@broadcom.com>, <rafal@milecki.pl> CC: <git@amd.com>, <linux-spi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <joel@jms.id.au>, <andrew@aj.id.au>, <radu_nicolae.pirea@upb.ro>, <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <claudiu.beznea@microchip.com>, <bcm-kernel-feedback-list@broadcom.com>, <fancer.lancer@gmail.com>, <kernel@pengutronix.de>, <festevam@gmail.com>, <linux-imx@nxp.com>, <jbrunet@baylibre.com>, <martin.blumenstingl@googlemail.com>, <avifishman70@gmail.com>, <tmaimon77@gmail.com>, <tali.perry1@gmail.com>, <venture@google.com>, <yuenn@google.com>, <benjaminfair@google.com>, <yogeshgaur.83@gmail.com>, <konrad.dybcio@somainline.org>, <alim.akhtar@samsung.com>, <ldewangan@nvidia.com>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>, <michal.simek@amd.com>, <linux-aspeed@lists.ozlabs.org>, <openbmc@lists.ozlabs.org>, <linux-arm-kernel@lists.infradead.org>, <linux-rpi-kernel@lists.infradead.org>, <linux-amlogic@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, <linux-arm-msm@vger.kernel.org>, <linux-rockchip@lists.infradead.org>, <linux-samsung-soc@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-sunxi@lists.linux.dev>, <linux-tegra@vger.kernel.org>, <netdev@vger.kernel.org>, <linux-wpan@vger.kernel.org>, <libertas-dev@lists.infradead.org>, <linux-wireless@vger.kernel.org>, <linux-mtd@lists.infradead.org>, <lars@metafoo.de>, <Michael.Hennerich@analog.com>, <linux-iio@vger.kernel.org>, <michael@walle.cc>, <palmer@dabbelt.com>, <linux-riscv@lists.infradead.org>, <alsa-devel@alsa-project.org>, <patches@opensource.cirrus.com>, <linuxppc-dev@lists.ozlabs.org>, <amitrkcian2002@gmail.com>, <amit.kumar-mahapatra@amd.com> Subject: [PATCH V6 13/15] spi: spi-zynqmp-gqspi: Add stacked memories support in GQSPI driver Date: Fri, 10 Mar 2023 23:02:15 +0530 Message-ID: <20230310173217.3429788-14-amit.kumar-mahapatra@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230310173217.3429788-1-amit.kumar-mahapatra@amd.com> References: <20230310173217.3429788-1-amit.kumar-mahapatra@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT055:EE_|SJ0PR12MB6902:EE_ X-MS-Office365-Filtering-Correlation-Id: 4050f504-4ad2-40e2-763c-08db218e5aee X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" <linux-riscv-bounces@lists.infradead.org> Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org |
Series |
Add support for stacked/parallel memories
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expand
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Context | Check | Description |
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conchuod/tree_selection | fail | Failed to apply to next/pending-fixes or riscv/for-next |
diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index fb2ca9b90eab..3d2b92a88e8a 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -156,6 +156,9 @@ #define GQSPI_FREQ_100MHZ 100000000 #define GQSPI_FREQ_150MHZ 150000000 +#define GQSPI_SELECT_LOWER_CS BIT(0) +#define GQSPI_SELECT_UPPER_CS BIT(1) + #define SPI_AUTOSUSPEND_TIMEOUT 3000 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; @@ -467,15 +470,17 @@ static void zynqmp_qspi_chipselect(struct spi_device *qspi, bool is_high) genfifoentry |= GQSPI_GENFIFO_MODE_SPI; + if (qspi->cs_index_mask & GQSPI_SELECT_UPPER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_UPPER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } else if (qspi->cs_index_mask & GQSPI_SELECT_LOWER_CS) { + zynqmp_gqspi_selectslave(xqspi, + GQSPI_SELECT_FLASH_CS_LOWER, + GQSPI_SELECT_FLASH_BUS_LOWER); + } + genfifoentry |= xqspi->genfifobus; if (!is_high) { - if (!spi_get_chipselect(qspi, 0)) { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_LOWER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_LOWER; - } else { - xqspi->genfifobus = GQSPI_GENFIFO_BUS_UPPER; - xqspi->genfifocs = GQSPI_GENFIFO_CS_UPPER; - } - genfifoentry |= xqspi->genfifobus; genfifoentry |= xqspi->genfifocs; genfifoentry |= GQSPI_GENFIFO_CS_SETUP; } else {
GQSPI supports two chip select CS0 & CS1. Update the driver to assert/de-assert the appropriate chip select as per the bits set in qspi->cs_index_mask. Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com> --- drivers/spi/spi-zynqmp-gqspi.c | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-)