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[v1] RISC-V: align Svpbmt Kconfig help text with other extensions

Message ID 20230324092840.3504267-1-conor.dooley@microchip.com (mailing list archive)
State Superseded
Headers show
Series [v1] RISC-V: align Svpbmt Kconfig help text with other extensions | expand

Checks

Context Check Description
conchuod/tree_selection fail Failed to apply to next/pending-fixes or riscv/for-next

Commit Message

Conor Dooley March 24, 2023, 9:28 a.m. UTC
Other extensions only capitalise the first letter in Kconfig text
menus, and provide a short comment about the extension's meaning.
Do the same for Svpbmt.
While editing one of the lines, reformat the "spelling" of 64-bit.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 2f6976418d0a..b12ab7a9d481 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -400,7 +400,7 @@  config RISCV_ISA_C
 	  If you don't know what to do here, say Y.
 
 config RISCV_ISA_SVPBMT
-	bool "SVPBMT extension support"
+	bool "Svpbmt extension support for supervisor mode page-based memory types"
 	depends on 64BIT && MMU
 	depends on RISCV_ALTERNATIVE
 	default y
@@ -413,7 +413,7 @@  config RISCV_ISA_SVPBMT
 	   that indicate the cacheability, idempotency, and ordering
 	   properties for access to that page.
 
-	   The SVPBMT extension is only available on 64Bit cpus.
+	   The Svpbmt extension is only available on 64-bit cpus.
 
 	   If you don't know what to do here, say Y.