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([106.51.189.144]) by smtp.gmail.com with ESMTPSA id w9-20020a170902904900b001aaed524541sm7015149plz.227.2023.05.08.04.53.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 May 2023 04:53:52 -0700 (PDT) From: Sunil V L To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-crypto@vger.kernel.org, platform-driver-x86@vger.kernel.org, llvm@lists.linux.dev Subject: [PATCH V5 07/21] ACPI: processor_core: RISC-V: Enable mapping processor to the hartid Date: Mon, 8 May 2023 17:22:23 +0530 Message-Id: <20230508115237.216337-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230508115237.216337-1-sunilvl@ventanamicro.com> References: <20230508115237.216337-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230508_045355_210184_92156B1C X-CRM114-Status: GOOD ( 14.68 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Rafael J . Wysocki" , "Rafael J . Wysocki" , Tom Rix , Weili Qian , Herbert Xu , Jonathan Corbet , Marc Zyngier , Daniel Lezcano , Andrew Jones , Albert Ou , Mark Gross , Hans de Goede , Paul Walmsley , Thomas Gleixner , Nathan Chancellor , Nick Desaulniers , Zhou Wang , Palmer Dabbelt , Len Brown , Maximilian Luz , "David S . Miller" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org processor_core needs arch-specific functions to map the ACPI ID to the physical ID. In RISC-V platforms, hartid is the physical id and RINTC structure in MADT provides this mapping. Add arch-specific function to get this mapping from RINTC. Signed-off-by: Sunil V L Acked-by: Rafael J. Wysocki Reviewed-by: Andrew Jones --- arch/riscv/include/asm/acpi.h | 3 +++ drivers/acpi/processor_core.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index bcade255bd6e..9be52b6ffae1 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -15,6 +15,9 @@ /* Basic configuration for ACPI */ #ifdef CONFIG_ACPI +typedef u64 phys_cpuid_t; +#define PHYS_CPUID_INVALID INVALID_HARTID + /* ACPI table mapping after acpi_permanent_mmap is set */ void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size); #define acpi_os_ioremap acpi_os_ioremap diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index 2ac48cda5b20..d6606a9f2da6 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c @@ -106,6 +106,32 @@ static int map_gicc_mpidr(struct acpi_subtable_header *entry, return -EINVAL; } +/* + * Retrieve the RISC-V hartid for the processor + */ +static int map_rintc_hartid(struct acpi_subtable_header *entry, + int device_declaration, u32 acpi_id, + phys_cpuid_t *hartid) +{ + struct acpi_madt_rintc *rintc = + container_of(entry, struct acpi_madt_rintc, header); + + if (!(rintc->flags & ACPI_MADT_ENABLED)) + return -ENODEV; + + /* device_declaration means Device object in DSDT, in the + * RISC-V, logical processors are required to + * have a Processor Device object in the DSDT, so we should + * check device_declaration here + */ + if (device_declaration && rintc->uid == acpi_id) { + *hartid = rintc->hart_id; + return 0; + } + + return -EINVAL; +} + static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, int type, u32 acpi_id) { @@ -136,6 +162,9 @@ static phys_cpuid_t map_madt_entry(struct acpi_table_madt *madt, } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) { if (!map_gicc_mpidr(header, type, acpi_id, &phys_id)) break; + } else if (header->type == ACPI_MADT_TYPE_RINTC) { + if (!map_rintc_hartid(header, type, acpi_id, &phys_id)) + break; } entry += header->length; }