From patchwork Wed May 10 16:24:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 13237073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF8BBC77B7C for ; Wed, 10 May 2023 16:35:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ByvkZ1K/sIprzRyPe8ZyX7zu+gY5yAmqrshAaRI769c=; b=aWRHsDPOf4+uyG uEdvdOAwiaec3+zKZ5xOqF9be6gIHPem/X/0ex5hS1X6xKXw90N5I6qJmCAnaorZ2BheYNqQv5vHu +ylkqCjvC1+h7GQA1zECO0lS369AvIECcCzeCEasG8k1SlIgeaFXuenN1XA/LKYUyDFW/ef5XfmMc YlPlJZuIBNcqUFRX6RVwX/HXhefrElWR/nWJiqizL7G5vZiJ3i2/iy3wSzKdeeLqISx/y+WSBt0x/ Y8MmYn7buWVN1DUD+3NzHlM03EqNYtpZnDAeFUYBtQiqMmmhaJ2q/E3HmvMUkjBkkLtCSOjbJcPbL lAKKwmSUrEVHiEGTjiJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pwmmf-006aBG-1h; Wed, 10 May 2023 16:35:21 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pwmmd-006aA7-0C for linux-riscv@lists.infradead.org; Wed, 10 May 2023 16:35:20 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A07C9649EF; Wed, 10 May 2023 16:35:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B40CFC433D2; Wed, 10 May 2023 16:35:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1683736518; bh=rdwY2xPsMRjdNsYlKkpqfjxeCKdDEMu/9hjRoCJFxdM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jt9AEIH+Dyddi6upgEhmzbo0fW2sCgcsIL5E6plZniKbKA3pV+N8YJjYfNbgcfwfI pU1FPgMKrfhVZfDOq4TC9Q91xNagOIHErXf/eUG2TF2iqO+4KO9SGWCkhZJHqVxbmn 1PkCFUgUyAHLUXY2Vvb2OLi7TpcCFCcr0JhL9dkLRaUOnRSpf3OZFHe6ZWj5H0OXKf R4VZ6XsZHX6vPyZ6rpZNo10EDdTAMHqE807ESgfFQIjq6IhlEoSjMFntg6+cYWX0Ws CBxsWm9Qc4APR2g/yPNAeym0GCuDnX9NzSsw6YgWtAu37F4NQw7Wc7K9SB/MAaSPfy 6xuhdKDTG25lg== From: Jisheng Zhang To: Sebastian Andrzej Siewior , Thomas Gleixner , Schaffner Tobias , Paul Walmsley , Palmer Dabbelt , Albert Ou , Arnd Bergmann Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Subject: [PATCH RT 2/3] riscv: add lazy preempt support Date: Thu, 11 May 2023 00:24:05 +0800 Message-Id: <20230510162406.1955-3-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230510162406.1955-1-jszhang@kernel.org> References: <20230510162406.1955-1-jszhang@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230510_093519_184434_6F48F4CC X-CRM114-Status: GOOD ( 15.35 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Implement the lazy preempt for riscv. Signed-off-by: Jisheng Zhang --- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/thread_info.h | 5 ++++- arch/riscv/kernel/asm-offsets.c | 1 + 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 348c0fa1fc8c..89e9d9fb35c4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -118,6 +118,7 @@ config RISCV select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP select HAVE_POSIX_CPU_TIMERS_TASK_WORK + select HAVE_PREEMPT_LAZY select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ select HAVE_STACKPROTECTOR diff --git a/arch/riscv/include/asm/thread_info.h b/arch/riscv/include/asm/thread_info.h index e0d202134b44..c5e9223e9b91 100644 --- a/arch/riscv/include/asm/thread_info.h +++ b/arch/riscv/include/asm/thread_info.h @@ -59,6 +59,7 @@ extern unsigned long spin_shadow_stack; struct thread_info { unsigned long flags; /* low level flags */ int preempt_count; /* 0=>preemptible, <0=>BUG */ + int preempt_lazy_count; /* 0=>preemptible, <0=>BUG */ /* * These stack pointers are overwritten on every system call or * exception. SP is also saved to the stack it can be recovered when @@ -90,6 +91,7 @@ struct thread_info { * - pending work-to-be-done flags are in lowest half-word * - other flags in upper half-word(s) */ +#define TIF_NEED_RESCHED_LAZY 0 /* lazy rescheduling */ #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ @@ -104,9 +106,10 @@ struct thread_info { #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL) #define _TIF_UPROBE (1 << TIF_UPROBE) +#define _TIF_NEED_RESCHED_LAZY (1 << TIF_NEED_RESCHED_LAZY) #define _TIF_WORK_MASK \ (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | \ - _TIF_NOTIFY_SIGNAL | _TIF_UPROBE) + _TIF_NEED_RESCHED_LAZY | _TIF_NOTIFY_SIGNAL | _TIF_UPROBE) #endif /* _ASM_RISCV_THREAD_INFO_H */ diff --git a/arch/riscv/kernel/asm-offsets.c b/arch/riscv/kernel/asm-offsets.c index d6a75aac1d27..1f8cccacb44e 100644 --- a/arch/riscv/kernel/asm-offsets.c +++ b/arch/riscv/kernel/asm-offsets.c @@ -36,6 +36,7 @@ void asm_offsets(void) OFFSET(TASK_THREAD_S11, task_struct, thread.s[11]); OFFSET(TASK_TI_FLAGS, task_struct, thread_info.flags); OFFSET(TASK_TI_PREEMPT_COUNT, task_struct, thread_info.preempt_count); + OFFSET(TASK_TI_PREEMPT_LAZY_COUNT, task_struct, thread_info.preempt_lazy_count); OFFSET(TASK_TI_KERNEL_SP, task_struct, thread_info.kernel_sp); OFFSET(TASK_TI_USER_SP, task_struct, thread_info.user_sp);