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[RFC,v1,3/4] ARM: dts: sun8i: t113s: Add GPADC node

Message ID 20230524082744.3215427-4-bigunclemax@gmail.com (mailing list archive)
State Handled Elsewhere
Headers show
Series Add support for Allwinner GPADC on D1/T113s/R329 SoCs | expand

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conchuod/tree_selection success Guessed tree name to be for-next at HEAD ac9a78681b92
conchuod/fixes_present success Fixes tag not required for -next series
conchuod/maintainers_pattern success MAINTAINERS pattern errors before the patch: 6 and now 6
conchuod/verify_signedoff success Signed-off-by tag matches author and committer
conchuod/kdoc success Errors and warnings before: 0 this patch: 0
conchuod/build_rv64_clang_allmodconfig success Errors and warnings before: 8 this patch: 8
conchuod/module_param success Was 0 now: 0
conchuod/build_rv64_gcc_allmodconfig success Errors and warnings before: 8 this patch: 8
conchuod/build_rv32_defconfig success Build OK
conchuod/dtb_warn_rv64 success Errors and warnings before: 6 this patch: 6
conchuod/header_inline success No static functions without inline keyword in header files
conchuod/checkpatch success total: 0 errors, 0 warnings, 0 checks, 18 lines checked
conchuod/build_rv64_nommu_k210_defconfig success Build OK
conchuod/verify_fixes success No Fixes tag
conchuod/build_rv64_nommu_virt_defconfig success Build OK

Commit Message

Maksim Kiselev May 24, 2023, 8:27 a.m. UTC
This patch adds declaration of the general purpose ADC with one channel
for T113s SoC.

Signed-off-by: Maxim Kiselev <bigunclemax@gmail.com>
---
 arch/arm/boot/dts/sun8i-t113s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)
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Patch

diff --git a/arch/arm/boot/dts/sun8i-t113s.dtsi b/arch/arm/boot/dts/sun8i-t113s.dtsi
index 804aa197a24f..d269fdde330d 100644
--- a/arch/arm/boot/dts/sun8i-t113s.dtsi
+++ b/arch/arm/boot/dts/sun8i-t113s.dtsi
@@ -42,6 +42,18 @@  gic: interrupt-controller@1c81000 {
 		#interrupt-cells = <3>;
 	};
 
+	soc {
+		gpadc: adc@2009000 {
+			compatible = "allwinner,sun8i-t113-gpadc";
+			reg = <0x2009000 0x1000>;
+			clocks = <&ccu CLK_BUS_GPADC>;
+			resets = <&ccu RST_BUS_GPADC>;
+			interrupts = <SOC_PERIPHERAL_IRQ(57) IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+			#io-channel-cells = <0>;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,