From patchwork Mon Jun 5 11:07:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andy Chiu X-Patchwork-Id: 13267787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB43EC7EE23 for ; Mon, 5 Jun 2023 16:40:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hUfXeFaEkYjb/tjY5b0nIQdcvuuqnM8JVKwRq+AiU/0=; b=I4B6Zq5t/enoBJ rAll/Sdo8HerXWwngaQem+gKgY6CpOib7qCTLFLY4ceF4FgnM5TBXK7FuzqBW0m4opgovZZLD1ztt X6biw1TR3ckBhFz6JHwOTCG5Ru5ir2l32NHGdVIOwehdOgu8DW2IhjHPG7bkELv2weU5eQit8VZpF Hu0KFdiR2dXC8QkQjKlxC8P5TIo0HOXKYQzh6RxFP62IAUw3TFaN7zyvKmFPk/6gwIK50/tUR/cVp cSQfXg0oenwlP4dEOWNX1ydNvrMEbXFKDFRU6CuXssP2Yd0Yz+le6s+3fhtBhOUawOPk33c3s8mL6 IrQ52JIDkbO+gHPsam7g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6DG1-00GARs-2K; Mon, 05 Jun 2023 16:40:37 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6DG0-00GARW-14 for linux-riscv@bombadil.infradead.org; Mon, 05 Jun 2023 16:40:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=BBfW759GkKFTzUJgKoX8uA384VuYsPAE0vmOulKke4E=; b=qhHdhbqJmT4x1NExGESdNvbcpG AdDsLnD75o8NsvHrTT1cazCAp/Jd4ocP40h52SeVZNAqfeqnv15q+6R/JOD2/GZ4IIjFlpbo53Eo3 7u1/KOW/QyfDJtXTnAQ4VNzsCKPt/5YTDMBkPdn2fCeNAzucbKST55Gdh8LLJIdiUCVpWeckbyeoC KSmrBxcifM4uICqyG+ZHyB8YiaXsMtYFcIZLNWZ0mNy/OTbndCNX/Xxrk6Fx4pJnaWbyFzXCCgUot 2NWuXdGEUaUhTwgopKAKAZAugcPGYsHsMu2iIdDBnHymeTScoQ5+BEwCc1ljyoBAlBPKdYV+md3MA PDS2hlCw==; Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by desiato.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6CLK-003OJx-0f for linux-riscv@lists.infradead.org; Mon, 05 Jun 2023 15:42:04 +0000 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1b00ecabdf2so45896555ad.2 for ; Mon, 05 Jun 2023 08:42:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; t=1685979720; x=1688571720; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BBfW759GkKFTzUJgKoX8uA384VuYsPAE0vmOulKke4E=; b=GsQQh15wVmlQHwcRg9bvdxbzEsIGOVvPRMdnOxcyy4n1fhB5ont6tYc4awzRi/gt3O iUjoTaMkIWsWK3dH28thritzx0yAslkk+BN2vdV4D6204M0SFaEXtwQIAPi1NkVGUlgZ C0YxsDT87raETp6RcOovcG213qgc6eXcPP4GnOrMXNocbyxafgrBSR/q1SMnnFWWHjx/ nbbaTY7phpfSP2g2ij0o/oT2WEwFNAkw8pO3JDBmiWyqybqBGlk1B8dPl+fWDDXVYY6K H1+vfHwTaM+2A4/c/5UQZiCygzg6nJBGzkMLLYF8eci8uvftIgKmacSvOb9nuweRi/FQ qiVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1685979720; x=1688571720; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BBfW759GkKFTzUJgKoX8uA384VuYsPAE0vmOulKke4E=; b=MjNPITl/YpO4DNmfQGnWki/rjMRqFI9vzwDGnn0p/Cu6lQakuU6N2Yg/U0/I3gFvmi XqBmNFX+xfNyxRGBGvL5COU6/gSPgpq/2m3WQzYiisc1VEZZy1OaH4I+TFIaqQNiqO8K H2MTxgny/6yP7ytN1SNDQBubZuBNvawEWswFzfm6PrrYjtDQilGmJVDe8YjsRkxQRF2u sdzD7DI1KMSeSjo6tTkwiGLQYKCoWfrveXHsUGFhncZfeQmdZGlA+SXHNzJGuJWQ176g bGniKb5YXCunaQhUyX9EyHsd95wxm+sJCq8lTOd6k9dKVBOG78FnGEq05mX0s2rpEWFY OU3w== X-Gm-Message-State: AC+VfDyEJyLr1G/TolkulO/g8SLDitRZC7zwIkdYl7DVm/7Ac3C8gvIw ryCvRUwKec1iEexb+3bx1uUYI7ZmX1VkUp3qtlcCQZ3DT5P1SplPp7d7WFza3uhZmidiKbHHXkg x0PbRSe2Hn30/cbZ6v0e+dI9oumOZQqh9QS/a74i2pQlCKkI0FkLNZ5uhrCuMMMrPl8jQizyTmp PgeISYo6HDidFHyWU= X-Google-Smtp-Source: ACHHUZ7rKTugKoVEziJV+gkC7XJI8FhQ4EESaFrT4CkW2ElkLsjNLgehEW4rqgWAicr6PBGWCEKbdQ== X-Received: by 2002:a17:902:ecc2:b0:1b0:42d1:ecd0 with SMTP id a2-20020a170902ecc200b001b042d1ecd0mr8656899plh.66.1685979719813; Mon, 05 Jun 2023 08:41:59 -0700 (PDT) Received: from hsinchu26.internal.sifive.com (59-124-168-89.hinet-ip.hinet.net. [59.124.168.89]) by smtp.gmail.com with ESMTPSA id jk19-20020a170903331300b001b0aec3ed59sm6725962plb.256.2023.06.05.08.41.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Jun 2023 08:41:59 -0700 (PDT) From: Andy Chiu To: linux-riscv@lists.infradead.org, palmer@dabbelt.com, anup@brainfault.org, atishp@atishpatra.org, kvm-riscv@lists.infradead.org, kvm@vger.kernel.org Cc: vineetg@rivosinc.com, greentime.hu@sifive.com, guoren@linux.alibaba.com, Andy Chiu , Paul Walmsley , Albert Ou , Vincent Chen , Heiko Stuebner , Guo Ren Subject: [PATCH -next v21 22/27] riscv: Add sysctl to set the default vector rule for new processes Date: Mon, 5 Jun 2023 11:07:19 +0000 Message-Id: <20230605110724.21391-23-andy.chiu@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230605110724.21391-1-andy.chiu@sifive.com> References: <20230605110724.21391-1-andy.chiu@sifive.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230605_164202_485550_A37C1CBB X-CRM114-Status: GOOD ( 15.78 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org To support Vector extension, the series exports variable-length vector registers on the signal frame. However, this potentially breaks abi if processing vector registers is required in the signal handler for old binaries. For example, there is such need if user-level context switch is triggerred via signals[1]. For this reason, it is best to leave a decision to distro maintainers, where the enablement of userspace Vector for new launching programs can be controlled. Developers may also need the switch to experiment with. The parameter is configurable through sysctl interface so a distro may turn off Vector early at init script if the break really happens in the wild. The switch will only take effects on new execve() calls once set. This will not effect existing processes that do not call execve(), nor processes which has been set with a non-default vstate_ctrl by making explicit PR_RISCV_V_SET_CONTROL prctl() calls. Link: https://lore.kernel.org/all/87cz4048rp.fsf@all.your.base.are.belong.to.us/ Signed-off-by: Andy Chiu Reviewed-by: Greentime Hu Reviewed-by: Vincent Chen Reviewed-by: Björn Töpel --- Changelog v20: - Use READ_ONCE to access riscv_v_implicit_uacc (Björn) --- arch/riscv/kernel/vector.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c index a7dec9230164..f9c8e19ab301 100644 --- a/arch/riscv/kernel/vector.c +++ b/arch/riscv/kernel/vector.c @@ -180,7 +180,7 @@ void riscv_v_vstate_ctrl_init(struct task_struct *tsk) next = riscv_v_ctrl_get_next(tsk); if (!next) { - if (riscv_v_implicit_uacc) + if (READ_ONCE(riscv_v_implicit_uacc)) cur = PR_RISCV_V_VSTATE_CTRL_ON; else cur = PR_RISCV_V_VSTATE_CTRL_OFF; @@ -243,3 +243,34 @@ long riscv_v_vstate_ctrl_set_current(unsigned long arg) return -EINVAL; } + +#ifdef CONFIG_SYSCTL + +static struct ctl_table riscv_v_default_vstate_table[] = { + { + .procname = "riscv_v_default_allow", + .data = &riscv_v_implicit_uacc, + .maxlen = sizeof(riscv_v_implicit_uacc), + .mode = 0644, + .proc_handler = proc_dobool, + }, + { } +}; + +static int __init riscv_v_sysctl_init(void) +{ + if (has_vector()) + if (!register_sysctl("abi", riscv_v_default_vstate_table)) + return -EINVAL; + return 0; +} + +#else /* ! CONFIG_SYSCTL */ +static int __init riscv_v_sysctl_init(void) { return 0; } +#endif /* ! CONFIG_SYSCTL */ + +static int riscv_v_init(void) +{ + return riscv_v_sysctl_init(); +} +core_initcall(riscv_v_init);