| Message ID | 20230719102057.22329-2-minda.chen@starfivetech.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | Refactoring Microchip PolarFire PCIe driver | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Failed to apply to next/pending-fixes, riscv/for-next or riscv/master |
On 19/07/2023 12:20, Minda Chen wrote: > Add PLDA XpressRICH PCIe host common properties dt-binding doc. > Microchip PolarFire PCIe host using PLDA IP. > Extract properties from Microchip PolarFire PCIe host. > > Signed-off-by: Minda Chen <minda.chen@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml How is it related with existing plda,xpressrich3-axi? > > diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > new file mode 100644 > index 000000000000..3627a846c5d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PLDA XpressRICH PCIe host common properties > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + - Minda Chen <minda.chen@starfivetech.com> > + > +description: > + Generic PLDA XpressRICH PCIe host common properties. > + > +select: false This should not be needed. > + > +properties: > + reg: > + description: > + At least host IP register set and configuration space are "At least" does not fit here since you do not allow anything else. > + required for normal controller work. > + maxItems: 2 > + > + reg-names: > + oneOf: > + - items: > + - const: cfg > + - const: apb > + - items: > + - const: host > + - const: cfg Maybe keep similar order, so cfg followed by host? Best regards, Krzysztof
On Wed, Jul 19, 2023 at 06:20:49PM +0800, Minda Chen wrote: > Add PLDA XpressRICH PCIe host common properties dt-binding doc. > Microchip PolarFire PCIe host using PLDA IP. > Extract properties from Microchip PolarFire PCIe host. > > Signed-off-by: Minda Chen <minda.chen@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > > diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > new file mode 100644 > index 000000000000..3627a846c5d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PLDA XpressRICH PCIe host common properties > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + - Minda Chen <minda.chen@starfivetech.com> > + > +description: > + Generic PLDA XpressRICH PCIe host common properties. > + > +select: false > + > +properties: > + reg: > + description: > + At least host IP register set and configuration space are > + required for normal controller work. > + maxItems: 2 > + > + reg-names: > + oneOf: > + - items: > + - const: cfg > + - const: apb > + - items: > + - const: host > + - const: cfg This didn't exist before. Where's the reasoning? There's no reason for 'cfg' to be in different spots and little reason to have different names for the host/apb space. Rob
On 2023/7/20 6:31, Rob Herring wrote: > On Wed, Jul 19, 2023 at 06:20:49PM +0800, Minda Chen wrote: >> Add PLDA XpressRICH PCIe host common properties dt-binding doc. >> Microchip PolarFire PCIe host using PLDA IP. >> Extract properties from Microchip PolarFire PCIe host. >> >> Signed-off-by: Minda Chen <minda.chen@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ >> 1 file changed, 72 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> new file mode 100644 >> index 000000000000..3627a846c5d1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> @@ -0,0 +1,72 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: PLDA XpressRICH PCIe host common properties >> + >> +maintainers: >> + - Daire McNamara <daire.mcnamara@microchip.com> >> + - Minda Chen <minda.chen@starfivetech.com> >> + >> +description: >> + Generic PLDA XpressRICH PCIe host common properties. >> + >> +select: false >> + >> +properties: >> + reg: >> + description: >> + At least host IP register set and configuration space are >> + required for normal controller work. >> + maxItems: 2 >> + >> + reg-names: >> + oneOf: >> + - items: >> + - const: cfg >> + - const: apb >> + - items: >> + - const: host >> + - const: cfg > > This didn't exist before. Where's the reasoning? > > There's no reason for 'cfg' to be in different spots and little reason > to have different names for the host/apb space. > > Rob > ok, I will follow cfg and apb
On 2023/7/19 18:52, Krzysztof Kozlowski wrote: > On 19/07/2023 12:20, Minda Chen wrote: >> Add PLDA XpressRICH PCIe host common properties dt-binding doc. >> Microchip PolarFire PCIe host using PLDA IP. >> Extract properties from Microchip PolarFire PCIe host. >> >> Signed-off-by: Minda Chen <minda.chen@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ >> 1 file changed, 72 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > > How is it related with existing plda,xpressrich3-axi? > yes, I just found plda,xpressrich3-axi. It is same IP in ARM juno soc. But it is firmware-initialized while microchip and starfive not. maybe I can rename this file to plda,xpressrich3-axi-common.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> new file mode 100644 >> index 000000000000..3627a846c5d1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> @@ -0,0 +1,72 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: PLDA XpressRICH PCIe host common properties >> + >> +maintainers: >> + - Daire McNamara <daire.mcnamara@microchip.com> >> + - Minda Chen <minda.chen@starfivetech.com> >> + >> +description: >> + Generic PLDA XpressRICH PCIe host common properties. >> + >> +select: false > > This should not be needed. > ok >> + >> +properties: >> + reg: >> + description: >> + At least host IP register set and configuration space are > > "At least" does not fit here since you do not allow anything else. > I will delete "At least" >> + required for normal controller work. >> + maxItems: 2 >> + >> + reg-names: >> + oneOf: >> + - items: >> + - const: cfg >> + - const: apb >> + - items: >> + - const: host >> + - const: cfg > > Maybe keep similar order, so cfg followed by host? > I will follow cfg, apb > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml new file mode 100644 index 000000000000..3627a846c5d1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PLDA XpressRICH PCIe host common properties + +maintainers: + - Daire McNamara <daire.mcnamara@microchip.com> + - Minda Chen <minda.chen@starfivetech.com> + +description: + Generic PLDA XpressRICH PCIe host common properties. + +select: false + +properties: + reg: + description: + At least host IP register set and configuration space are + required for normal controller work. + maxItems: 2 + + reg-names: + oneOf: + - items: + - const: cfg + - const: apb + - items: + - const: host + - const: cfg + + interrupts: + minItems: 1 + items: + - description: PCIe host controller + - description: builtin MSI controller + + interrupt-names: + minItems: 1 + items: + - const: pcie + - const: msi + + msi-controller: + description: Identifies the node as an MSI controller. + + msi-parent: + description: MSI controller the device is capable of using. + + interrupt-controller: + type: object + properties: + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + required: + - '#address-cells' + - '#interrupt-cells' + - interrupt-controller + + additionalProperties: false + +additionalProperties: true + +...