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Wed, 19 Jul 2023 04:36:15 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([171.76.86.130]) by smtp.gmail.com with ESMTPSA id j10-20020aa783ca000000b00669c99d05fasm3050408pfn.150.2023.07.19.04.36.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jul 2023 04:36:14 -0700 (PDT) From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Marc Zyngier , Rob Herring , Krzysztof Kozlowski , Frank Rowand , Conor Dooley Subject: [PATCH v6 04/14] irqchip/sifive-plic: Use platform driver probing for PLIC Date: Wed, 19 Jul 2023 17:05:32 +0530 Message-Id: <20230719113542.2293295-5-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230719113542.2293295-1-apatel@ventanamicro.com> References: <20230719113542.2293295-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230719_043617_479797_6BD54AD8 X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , devicetree@vger.kernel.org, Saravana Kannan , Anup Patel , linux-kernel@vger.kernel.org, Atish Patra , linux-riscv@lists.infradead.org, Andrew Jones Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The PLIC driver does not require very early initialization so let us replace use of IRQCHIP_DECLARE() with IRQCHIP_PLATFORM_DRIVER_xyz() so that PLIC is probed through platform driver probing. Signed-off-by: Anup Patel --- drivers/irqchip/irq-sifive-plic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 56b0544b1f27..dc02f0761ced 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -569,8 +569,10 @@ static int __init plic_init(struct device_node *node, return __plic_init(node, parent, 0); } -IRQCHIP_DECLARE(sifive_plic, "sifive,plic-1.0.0", plic_init); -IRQCHIP_DECLARE(riscv_plic0, "riscv,plic0", plic_init); /* for legacy systems */ +IRQCHIP_PLATFORM_DRIVER_BEGIN(sifive_plic) +IRQCHIP_MATCH("sifive,plic-1.0.0", plic_init) +IRQCHIP_MATCH("riscv,plic0", plic_init) /* for legacy systems */ +IRQCHIP_PLATFORM_DRIVER_END(sifive_plic) static int __init plic_edge_init(struct device_node *node, struct device_node *parent) @@ -578,5 +580,7 @@ static int __init plic_edge_init(struct device_node *node, return __plic_init(node, parent, BIT(PLIC_QUIRK_EDGE_INTERRUPT)); } -IRQCHIP_DECLARE(andestech_nceplic100, "andestech,nceplic100", plic_edge_init); -IRQCHIP_DECLARE(thead_c900_plic, "thead,c900-plic", plic_edge_init); +IRQCHIP_PLATFORM_DRIVER_BEGIN(edge_plic) +IRQCHIP_MATCH("andestech,nceplic100", plic_edge_init) +IRQCHIP_MATCH("thead,c900-plic", plic_edge_init) +IRQCHIP_PLATFORM_DRIVER_END(edge_plic)