| Message ID | 20230725073039.14382-2-samin.guo@starfivetech.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | Add StarFive Visionfive 2 v1.3B gmac phy configuration | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/tree_selection | fail | Failed to apply to next/pending-fixes, riscv/for-next or riscv/master |
On Tue, Jul 25, 2023 at 03:30:39PM +0800, Samin Guo wrote: > Add visionfive 2 v1.3B gmac phy configuration, including drive strength > and inverting configuration. > > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > Signed-off-by: Samin Guo <samin.guo@starfivetech.com> I opted to squash this (and my temporary revert that becomes a NOP) into the original patch. It should appear in linux-next tomorrow as 0104340a67b1 ("riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy"). Thanks, Conor.
在 2023/7/25 15:44:06, Conor Dooley wrote: > On Tue, Jul 25, 2023 at 03:30:39PM +0800, Samin Guo wrote: >> Add visionfive 2 v1.3B gmac phy configuration, including drive strength >> and inverting configuration. >> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> Signed-off-by: Samin Guo <samin.guo@starfivetech.com> > > I opted to squash this (and my temporary revert that becomes a NOP) into > the original patch. It should appear in linux-next tomorrow as 0104340a67b1 > ("riscv: dts: starfive: visionfive 2: Add configuration of gmac and phy"). > > Thanks, > Conor. Thank you so much! Best regards, Samin
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts index 7bca5d9e8f9b..d4ea4a2c0b9b 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts @@ -25,11 +25,20 @@ }; &phy0 { + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + motorcomm,rx-clk-drv-microamp = <3970>; + motorcomm,rx-data-drv-microamp = <2910>; rx-internal-delay-ps = <1500>; tx-internal-delay-ps = <1500>; }; &phy1 { + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + motorcomm,rx-clk-drv-microamp = <3970>; + motorcomm,rx-data-drv-microamp = <2910>; rx-internal-delay-ps = <300>; tx-internal-delay-ps = <0>; };