diff mbox series

Revert "riscv: dts: allwinner: d1: Add CAN controller nodes"

Message ID 20230807-riscv-allwinner-d1-revert-can-controller-nodes-v1-1-eb3f70b435d9@pengutronix.de (mailing list archive)
State Handled Elsewhere
Headers show
Series Revert "riscv: dts: allwinner: d1: Add CAN controller nodes" | expand

Checks

Context Check Description
conchuod/tree_selection fail Failed to apply to next/pending-fixes, riscv/for-next or riscv/master

Commit Message

Marc Kleine-Budde Aug. 7, 2023, 7:28 a.m. UTC
It turned out the dtsi changes were not quite ready, revert them for
now.

This reverts commit 6ea1ad888f5900953a21853e709fa499fdfcb317.

Link: https://lore.kernel.org/all/2690764.mvXUDI8C0e@jernej-laptop
Suggested-by: Jernej Škrabec <jernej.skrabec@gmail.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
---
 arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 30 -----------------------
 1 file changed, 30 deletions(-)


---
base-commit: c35e927cbe09d38b2d72183bb215901183927c68
change-id: 20230807-riscv-allwinner-d1-revert-can-controller-nodes-65f62e04619c

Best regards,

Comments

Jernej Škrabec Aug. 7, 2023, 7:38 a.m. UTC | #1
Dne ponedeljek, 07. avgust 2023 ob 09:28:50 CEST je Marc Kleine-Budde 
napisal(a):
> It turned out the dtsi changes were not quite ready, revert them for
> now.
> 
> This reverts commit 6ea1ad888f5900953a21853e709fa499fdfcb317.
> 
> Link: https://lore.kernel.org/all/2690764.mvXUDI8C0e@jernej-laptop
> Suggested-by: Jernej Škrabec <jernej.skrabec@gmail.com>
> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Best regards,
Jernej

> ---
>  arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 30
> ----------------------- 1 file changed, 30 deletions(-)
> 
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index
> 4086c0cc0f9d..1bb1e5cae602 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -131,18 +131,6 @@ uart3_pb_pins: uart3-pb-pins {
>  				pins = "PB6", "PB7";
>  				function = "uart3";
>  			};
> -
> -			/omit-if-no-ref/
> -			can0_pins: can0-pins {
> -				pins = "PB2", "PB3";
> -				function = "can0";
> -			};
> -
> -			/omit-if-no-ref/
> -			can1_pins: can1-pins {
> -				pins = "PB4", "PB5";
> -				function = "can1";
> -			};
>  		};
> 
>  		ccu: clock-controller@2001000 {
> @@ -891,23 +879,5 @@ rtc: rtc@7090000 {
>  			clock-names = "bus", "hosc", "ahb";
>  			#clock-cells = <1>;
>  		};
> -
> -		can0: can@2504000 {
> -			compatible = "allwinner,sun20i-d1-can";
> -			reg = <0x02504000 0x400>;
> -			interrupts = <SOC_PERIPHERAL_IRQ(21) 
IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&ccu CLK_BUS_CAN0>;
> -			resets = <&ccu RST_BUS_CAN0>;
> -			status = "disabled";
> -		};
> -
> -		can1: can@2504400 {
> -			compatible = "allwinner,sun20i-d1-can";
> -			reg = <0x02504400 0x400>;
> -			interrupts = <SOC_PERIPHERAL_IRQ(22) 
IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&ccu CLK_BUS_CAN1>;
> -			resets = <&ccu RST_BUS_CAN1>;
> -			status = "disabled";
> -		};
>  	};
>  };
> 
> ---
> base-commit: c35e927cbe09d38b2d72183bb215901183927c68
> change-id:
> 20230807-riscv-allwinner-d1-revert-can-controller-nodes-65f62e04619c
> 
> Best regards,
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index 4086c0cc0f9d..1bb1e5cae602 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -131,18 +131,6 @@  uart3_pb_pins: uart3-pb-pins {
 				pins = "PB6", "PB7";
 				function = "uart3";
 			};
-
-			/omit-if-no-ref/
-			can0_pins: can0-pins {
-				pins = "PB2", "PB3";
-				function = "can0";
-			};
-
-			/omit-if-no-ref/
-			can1_pins: can1-pins {
-				pins = "PB4", "PB5";
-				function = "can1";
-			};
 		};
 
 		ccu: clock-controller@2001000 {
@@ -891,23 +879,5 @@  rtc: rtc@7090000 {
 			clock-names = "bus", "hosc", "ahb";
 			#clock-cells = <1>;
 		};
-
-		can0: can@2504000 {
-			compatible = "allwinner,sun20i-d1-can";
-			reg = <0x02504000 0x400>;
-			interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_CAN0>;
-			resets = <&ccu RST_BUS_CAN0>;
-			status = "disabled";
-		};
-
-		can1: can@2504400 {
-			compatible = "allwinner,sun20i-d1-can";
-			reg = <0x02504400 0x400>;
-			interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_CAN1>;
-			resets = <&ccu RST_BUS_CAN1>;
-			status = "disabled";
-		};
 	};
 };