| Message ID | 20230808045145.3552312-1-vincent.chen@sifive.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [RFC,v1] clocksource: entend the max_delta_ns of timer-riscv andtimer-clint to ULONG_MAX | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Single patches do not need cover letters |
| conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 174e8ac0272d |
| conchuod/fixes_present | success | Fixes tag not required for -next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 4 and now 4 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 12 this patch: 12 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 16 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | No Fixes tag |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
Hey Vincent, On Tue, Aug 08, 2023 at 12:51:45PM +0800, Vincent Chen wrote: > From: Vincentc Chen <vincent.chen@sifive.com> > > When registering the riscv-timer or clint-timer as a clock_event device, > the driver needs to specify the value of max_delta_ticks. This value > directly influences the max_delta_ns, which signifies the maximum time > interval for configuring subsequent clock events. Currently, both > riscv-timer and clint-timer are set with a max_delta_ticks value of > 0x7fff_ffff. When the timer operates at a high frequency, such as 1GHz, > this causes the system only can sleep for a short time. For the 1GHz > case, the sleep cannot exceed two seconds. To address this limitation, > refer to other timer implementations to extend it to 2^(bit-width of the > timer) - 1. Because the bit-width of $mtimecmp is 64bit, so this value > becomes ULONG_MAX (0xffff_ffff_ffff_ffff). You've marked this as RFC - what is it that you are unsure about that prevents this from being a regular patch? Thanks, Conor. > > Signed-off-by: Vincentc Chen <vincent.chen@sifive.com> > --- > drivers/clocksource/timer-clint.c | 2 +- > drivers/clocksource/timer-riscv.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c > index 9a55e733ae99..09fd292eb83d 100644 > --- a/drivers/clocksource/timer-clint.c > +++ b/drivers/clocksource/timer-clint.c > @@ -131,7 +131,7 @@ static int clint_timer_starting_cpu(unsigned int cpu) > struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu); > > ce->cpumask = cpumask_of(cpu); > - clockevents_config_and_register(ce, clint_timer_freq, 100, 0x7fffffff); > + clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX); > > enable_percpu_irq(clint_timer_irq, > irq_get_trigger_type(clint_timer_irq)); > diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c > index da3071b387eb..b25c91d41968 100644 > --- a/drivers/clocksource/timer-riscv.c > +++ b/drivers/clocksource/timer-riscv.c > @@ -94,7 +94,7 @@ static int riscv_timer_starting_cpu(unsigned int cpu) > ce->irq = riscv_clock_event_irq; > if (riscv_timer_cannot_wake_cpu) > ce->features |= CLOCK_EVT_FEAT_C3STOP; > - clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff); > + clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX); > > enable_percpu_irq(riscv_clock_event_irq, > irq_get_trigger_type(riscv_clock_event_irq)); > -- > 2.34.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c index 9a55e733ae99..09fd292eb83d 100644 --- a/drivers/clocksource/timer-clint.c +++ b/drivers/clocksource/timer-clint.c @@ -131,7 +131,7 @@ static int clint_timer_starting_cpu(unsigned int cpu) struct clock_event_device *ce = per_cpu_ptr(&clint_clock_event, cpu); ce->cpumask = cpumask_of(cpu); - clockevents_config_and_register(ce, clint_timer_freq, 100, 0x7fffffff); + clockevents_config_and_register(ce, clint_timer_freq, 100, ULONG_MAX); enable_percpu_irq(clint_timer_irq, irq_get_trigger_type(clint_timer_irq)); diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index da3071b387eb..b25c91d41968 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -94,7 +94,7 @@ static int riscv_timer_starting_cpu(unsigned int cpu) ce->irq = riscv_clock_event_irq; if (riscv_timer_cannot_wake_cpu) ce->features |= CLOCK_EVT_FEAT_C3STOP; - clockevents_config_and_register(ce, riscv_timebase, 100, 0x7fffffff); + clockevents_config_and_register(ce, riscv_timebase, 100, ULONG_MAX); enable_percpu_irq(riscv_clock_event_irq, irq_get_trigger_type(riscv_clock_event_irq));