Message ID | 20230818135723.80612-2-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 93e0e2419b65148f324570f8116dfce2f8d34388 |
Headers | show
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Fri, 18 Aug 2023 06:57:36 -0700 (PDT) From: Prabhakar <prabhakar.csengg@gmail.com> X-Google-Original-From: Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> To: Arnd Bergmann <arnd@arndb.de>, Conor Dooley <conor.dooley@microchip.com>, Geert Uytterhoeven <geert+renesas@glider.be>, Guo Ren <guoren@kernel.org>, Andrew Jones <ajones@ventanamicro.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Samuel Holland <samuel@sholland.org>, linux-riscv@lists.infradead.org, Christoph Hellwig <hch@infradead.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com> Cc: Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar <prabhakar.csengg@gmail.com>, Biju Das <biju.das.jz@bp.renesas.com>, Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>, Heiko Stuebner <heiko@sntech.de> Subject: [PATCH v12 1/6] riscv: asm: vendorid_list: Add Andes Technology to the vendors list Date: Fri, 18 Aug 2023 14:57:18 +0100 Message-Id: <20230818135723.80612-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20230818135723.80612-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230818_065741_455933_D9C3707E X-CRM114-Status: UNSURE ( 9.45 ) X-CRM114-Notice: Please train this message. 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Series |
Add non-coherent DMA support for AX45MP
|
expand
|
Context | Check | Description |
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conchuod/tree_selection | fail | Failed to apply to next/pending-fixes, riscv/for-next or riscv/master |
diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h index cb89af3f0704..e55407ace0c3 100644 --- a/arch/riscv/include/asm/vendorid_list.h +++ b/arch/riscv/include/asm/vendorid_list.h @@ -5,6 +5,7 @@ #ifndef ASM_VENDOR_LIST_H #define ASM_VENDOR_LIST_H +#define ANDESTECH_VENDOR_ID 0x31e #define SIFIVE_VENDOR_ID 0x489 #define THEAD_VENDOR_ID 0x5b7