| Message ID | 20230912174928.528414-2-apatel@ventanamicro.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Linux RISC-V AIA Support | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Series has a cover letter |
| conchuod/tree_selection | success | Guessed tree name to be fixes at HEAD e0152e7481c6 |
| conchuod/fixes_present | success | Fixes tag present in non-next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 2 and now 2 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 39 this patch: 39 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 19 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | Fixes tag looks correct |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Tue, Sep 12, 2023 at 10:50 AM Anup Patel <apatel@ventanamicro.com> wrote: > > The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails > for HARTs disabled in the DT. This results in the following warning > thrown by the RISC-V INTC driver for the E-core on SiFive boards: > > [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller > > The riscv_of_parent_hartid() is only expected to read the hartid from > the DT so we should directly call of_get_cpu_hwid() instead of calling > riscv_of_processor_hartid(). > > Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64") > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > arch/riscv/kernel/cpu.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index c17dacb1141c..157ace8b262c 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -125,13 +125,14 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo > */ > int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) > { > - int rc; > - > for (; node; node = node->parent) { > if (of_device_is_compatible(node, "riscv")) { > - rc = riscv_of_processor_hartid(node, hartid); > - if (!rc) > - return 0; > + *hartid = (unsigned long)of_get_cpu_hwid(node, 0); > + if (*hartid == ~0UL) { > + pr_warn("Found CPU without hart ID\n"); > + return -ENODEV; > + } > + return 0; > } > } > > -- > 2.34.1 > LGTM. Reviewed-by: Atish Patra <atishp@rivosinc.com>
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index c17dacb1141c..157ace8b262c 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -125,13 +125,14 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo */ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) { - int rc; - for (; node; node = node->parent) { if (of_device_is_compatible(node, "riscv")) { - rc = riscv_of_processor_hartid(node, hartid); - if (!rc) - return 0; + *hartid = (unsigned long)of_get_cpu_hwid(node, 0); + if (*hartid == ~0UL) { + pr_warn("Found CPU without hart ID\n"); + return -ENODEV; + } + return 0; } }
The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails for HARTs disabled in the DT. This results in the following warning thrown by the RISC-V INTC driver for the E-core on SiFive boards: [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller The riscv_of_parent_hartid() is only expected to read the hartid from the DT so we should directly call of_get_cpu_hwid() instead of calling riscv_of_processor_hartid(). Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64") Signed-off-by: Anup Patel <apatel@ventanamicro.com> --- arch/riscv/kernel/cpu.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)