| Message ID | 20230916-saddling-dastardly-8cf6d1263c24@spud (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Conor Dooley |
| Headers | show |
| Series | [v1] riscv: dts: allwinner: remove address-cells from intc node | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/cover_letter | success | Single patches do not need cover letters |
| conchuod/tree_selection | success | Guessed tree name to be fixes at HEAD 8eb8fe67e2c8 |
| conchuod/fixes_present | success | Fixes tag present in non-next series |
| conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 5 and now 5 |
| conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
| conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
| conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/module_param | success | Was 0 now: 0 |
| conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 9 this patch: 9 |
| conchuod/build_rv32_defconfig | success | Build OK |
| conchuod/dtb_warn_rv64 | success | Errors and warnings before: 25 this patch: 25 |
| conchuod/header_inline | success | No static functions without inline keyword in header files |
| conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 7 lines checked |
| conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
| conchuod/verify_fixes | success | Fixes tag looks correct |
| conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
Dne sobota, 16. september 2023 ob 11:14:00 CEST je Conor Dooley napisal(a): > From: Conor Dooley <conor.dooley@microchip.com> > > A recent submission [1] from Rob has added additionalProperties: false > to the interrupt-controller child node of RISC-V cpus, highlighting that > the D1 DT has been incorrectly using #address-cells since its > introduction. It has no child nodes, so #address-cells is not needed. > Remove it. > > Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree") > Link: > https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.41844 > 68-1-robh@kernel.org/ [1] Signed-off-by: Conor Dooley > <conor.dooley@microchip.com> > --- > CC: Rob Herring <robh+dt@kernel.org> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > CC: Conor Dooley <conor+dt@kernel.org> > CC: Chen-Yu Tsai <wens@csie.org> > CC: Jernej Skrabec <jernej.skrabec@gmail.com> > CC: Samuel Holland <samuel@sholland.org> > CC: devicetree@vger.kernel.org > CC: linux-riscv@lists.infradead.org > CC: linux-sunxi@lists.linux.dev > CC: linux-kernel@vger.kernel.org Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index > 8275630af977..b8684312593e 100644 > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > @@ -30,7 +30,6 @@ cpu0: cpu@0 { > cpu0_intc: interrupt-controller { > compatible = "riscv,cpu-intc"; > interrupt-controller; > - #address-cells = <0>; > #interrupt-cells = <1>; > }; > };
Dne sobota, 16. september 2023 ob 11:14:00 CEST je Conor Dooley napisal(a): > From: Conor Dooley <conor.dooley@microchip.com> > > A recent submission [1] from Rob has added additionalProperties: false > to the interrupt-controller child node of RISC-V cpus, highlighting that > the D1 DT has been incorrectly using #address-cells since its > introduction. It has no child nodes, so #address-cells is not needed. > Remove it. > > Fixes: 077e5f4f5528 ("riscv: dts: allwinner: Add the D1/D1s SoC devicetree") > Link: https://patchwork.kernel.org/project/linux-riscv/patch/20230915201946.4184468-1-robh@kernel.org/ [1] > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Applied, thanks! Best regards, Jernej > --- > CC: Rob Herring <robh+dt@kernel.org> > CC: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > CC: Conor Dooley <conor+dt@kernel.org> > CC: Chen-Yu Tsai <wens@csie.org> > CC: Jernej Skrabec <jernej.skrabec@gmail.com> > CC: Samuel Holland <samuel@sholland.org> > CC: devicetree@vger.kernel.org > CC: linux-riscv@lists.infradead.org > CC: linux-sunxi@lists.linux.dev > CC: linux-kernel@vger.kernel.org > --- > arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > index 8275630af977..b8684312593e 100644 > --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi > @@ -30,7 +30,6 @@ cpu0: cpu@0 { > cpu0_intc: interrupt-controller { > compatible = "riscv,cpu-intc"; > interrupt-controller; > - #address-cells = <0>; > #interrupt-cells = <1>; > }; > }; >
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 8275630af977..b8684312593e 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -30,7 +30,6 @@ cpu0: cpu@0 { cpu0_intc: interrupt-controller { compatible = "riscv,cpu-intc"; interrupt-controller; - #address-cells = <0>; #interrupt-cells = <1>; }; };