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Tue, 17 Oct 2023 13:45:26 -0700 (PDT) Received: from [127.0.1.1] ([2601:1c2:1800:f680:51d6:dcd6:63ef:52e9]) by smtp.gmail.com with ESMTPSA id w3-20020a17090a6b8300b0027b168cb011sm1906553pjj.56.2023.10.17.13.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Oct 2023 13:45:26 -0700 (PDT) From: Drew Fustini Date: Tue, 17 Oct 2023 13:43:50 -0700 Subject: [PATCH v2 4/7] riscv: defconfig: Enable mmc and dma drivers for T-Head TH1520 MIME-Version: 1.0 Message-Id: <20231017-th1520-mmc-v2-4-4678c8cc4048@baylibre.com> References: <20231017-th1520-mmc-v2-0-4678c8cc4048@baylibre.com> In-Reply-To: <20231017-th1520-mmc-v2-0-4678c8cc4048@baylibre.com> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Adrian Hunter , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1697575515; l=873; i=dfustini@baylibre.com; s=20230430; h=from:subject:message-id; bh=1b6E7IcYPcGUX3CsWI9slySNkcpgVBWsbFODn/9h1s4=; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Drew Fustini , Han Gao , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Robert Nelson , Jason Kridner , Xi Ruoyao , linux-riscv@lists.infradead.org Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Enable the mmc controller driver and dma controller driver needed for T-Head TH1520 based boards, like the LicheePi 4A and BeagleV-Ahead, to boot from eMMC storage. Signed-off-by: Drew Fustini Reviewed-by: Guo Ren --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index ab86ec3b9eab..c5a8583236d0 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -168,12 +168,14 @@ CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_CADENCE=y +CONFIG_MMC_SDHCI_OF_DWCMSHC=y CONFIG_MMC_SPI=y CONFIG_MMC_SUNXI=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_SUN6I=y CONFIG_DMADEVICES=y CONFIG_DMA_SUN6I=m +CONFIG_DW_AXI_DMAC=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_BALLOON=y CONFIG_VIRTIO_INPUT=y