| Message ID | 20231019154552.23351-2-andy.chiu@sifive.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: support kernel-mode Vector | expand |
On Thu, Oct 19, 2023 at 03:45:48PM +0000, Andy Chiu wrote: > From: Greentime Hu <greentime.hu@sifive.com> > > Add kernel_vector_begin() and kernel_vector_end() function declarations > and corresponding definitions in kernel_mode_vector.c > > These are needed to wrap uses of vector in kernel mode. > > Co-developed-by: Vincent Chen <vincent.chen@sifive.com> > Signed-off-by: Vincent Chen <vincent.chen@sifive.com> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Signed-off-by: Andy Chiu <andy.chiu@sifive.com> > --- > Changelog v3: > - Reorder patch 1 to patch 3 to make use of > {get,put}_cpu_vector_context later. > - Export {get,put}_cpu_vector_context. > - Save V context after disabling preemption. (Guo) > - Fix a build fail. (Conor) Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > - Remove irqs_disabled() check as it is not needed, fix styling. (Björn) > Changelog v2: > - 's/kernel_rvv/kernel_vector' and return void in kernel_vector_begin > (Conor) > - export may_use_simd to include/asm/simd.h > --- > arch/riscv/include/asm/simd.h | 49 +++++++++++++ > arch/riscv/include/asm/vector.h | 4 ++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/kernel_mode_vector.c | 99 ++++++++++++++++++++++++++ > 4 files changed, 153 insertions(+) > create mode 100644 arch/riscv/include/asm/simd.h > create mode 100644 arch/riscv/kernel/kernel_mode_vector.c > > diff --git a/arch/riscv/include/asm/simd.h b/arch/riscv/include/asm/simd.h > new file mode 100644 > index 000000000000..0c5ba555b460 > --- /dev/null > +++ b/arch/riscv/include/asm/simd.h > @@ -0,0 +1,49 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org> > + * Copyright (C) 2023 SiFive > + */ > + > +#ifndef __ASM_SIMD_H > +#define __ASM_SIMD_H > + > +#include <linux/compiler.h> > +#include <linux/irqflags.h> > +#include <linux/percpu.h> > +#include <linux/preempt.h> > +#include <linux/types.h> > + > +#ifdef CONFIG_RISCV_ISA_V > + > +DECLARE_PER_CPU(bool, vector_context_busy); > + > +/* > + * may_use_simd - whether it is allowable at this time to issue vector > + * instructions or access the vector register file > + * > + * Callers must not assume that the result remains true beyond the next > + * preempt_enable() or return from softirq context. > + */ > +static __must_check inline bool may_use_simd(void) > +{ > + /* > + * vector_context_busy is only set while preemption is disabled, > + * and is clear whenever preemption is enabled. Since > + * this_cpu_read() is atomic w.r.t. preemption, vector_context_busy > + * cannot change under our feet -- if it's set we cannot be > + * migrated, and if it's clear we cannot be migrated to a CPU > + * where it is set. > + */ > + return !in_hardirq() && !in_nmi() && !this_cpu_read(vector_context_busy); > +} > + > +#else /* ! CONFIG_RISCV_ISA_V */ > + > +static __must_check inline bool may_use_simd(void) > +{ > + return false; > +} > + > +#endif /* ! CONFIG_RISCV_ISA_V */ > + > +#endif > diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h > index c5ee07b3df07..8b8ece690ea1 100644 > --- a/arch/riscv/include/asm/vector.h > +++ b/arch/riscv/include/asm/vector.h > @@ -22,6 +22,10 @@ > extern unsigned long riscv_v_vsize; > int riscv_v_setup_vsize(void); > bool riscv_v_first_use_handler(struct pt_regs *regs); > +void kernel_vector_begin(void); > +void kernel_vector_end(void); > +void get_cpu_vector_context(void); > +void put_cpu_vector_context(void); > > static __always_inline bool has_vector(void) > { > diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile > index 95cf25d48405..0597bb668b6e 100644 > --- a/arch/riscv/kernel/Makefile > +++ b/arch/riscv/kernel/Makefile > @@ -62,6 +62,7 @@ obj-$(CONFIG_MMU) += vdso.o vdso/ > obj-$(CONFIG_RISCV_M_MODE) += traps_misaligned.o > obj-$(CONFIG_FPU) += fpu.o > obj-$(CONFIG_RISCV_ISA_V) += vector.o > +obj-$(CONFIG_RISCV_ISA_V) += kernel_mode_vector.o > obj-$(CONFIG_SMP) += smpboot.o > obj-$(CONFIG_SMP) += smp.o > obj-$(CONFIG_SMP) += cpu_ops.o > diff --git a/arch/riscv/kernel/kernel_mode_vector.c b/arch/riscv/kernel/kernel_mode_vector.c > new file mode 100644 > index 000000000000..74936e108771 > --- /dev/null > +++ b/arch/riscv/kernel/kernel_mode_vector.c > @@ -0,0 +1,99 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * Copyright (C) 2012 ARM Ltd. > + * Author: Catalin Marinas <catalin.marinas@arm.com> > + * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org> > + * Copyright (C) 2021 SiFive > + */ > +#include <linux/compiler.h> > +#include <linux/irqflags.h> > +#include <linux/percpu.h> > +#include <linux/preempt.h> > +#include <linux/types.h> > + > +#include <asm/vector.h> > +#include <asm/switch_to.h> > +#include <asm/simd.h> > + > +DEFINE_PER_CPU(bool, vector_context_busy); > + > +/* > + * Claim ownership of the CPU vector context for use by the calling context. > + * > + * The caller may freely manipulate the vector context metadata until > + * put_cpu_vector_context() is called. > + */ > +void get_cpu_vector_context(void) > +{ > + bool busy; > + > + preempt_disable(); > + busy = __this_cpu_xchg(vector_context_busy, true); > + > + WARN_ON(busy); > +} > + > +/* > + * Release the CPU vector context. > + * > + * Must be called from a context in which get_cpu_vector_context() was > + * previously called, with no call to put_cpu_vector_context() in the > + * meantime. > + */ > +void put_cpu_vector_context(void) > +{ > + bool busy = __this_cpu_xchg(vector_context_busy, false); > + > + WARN_ON(!busy); > + preempt_enable(); > +} > + > +/* > + * kernel_vector_begin(): obtain the CPU vector registers for use by the calling > + * context > + * > + * Must not be called unless may_use_simd() returns true. > + * Task context in the vector registers is saved back to memory as necessary. > + * > + * A matching call to kernel_vector_end() must be made before returning from the > + * calling context. > + * > + * The caller may freely use the vector registers until kernel_vector_end() is > + * called. > + */ > +void kernel_vector_begin(void) > +{ > + if (WARN_ON(!has_vector())) > + return; > + > + BUG_ON(!may_use_simd()); > + > + get_cpu_vector_context(); > + > + riscv_v_vstate_save(current, task_pt_regs(current)); > + > + riscv_v_enable(); > +} > +EXPORT_SYMBOL_GPL(kernel_vector_begin); > + > +/* > + * kernel_vector_end(): give the CPU vector registers back to the current task > + * > + * Must be called from a context in which kernel_vector_begin() was previously > + * called, with no call to kernel_vector_end() in the meantime. > + * > + * The caller must not use the vector registers after this function is called, > + * unless kernel_vector_begin() is called again in the meantime. > + */ > +void kernel_vector_end(void) > +{ > + if (WARN_ON(!has_vector())) > + return; > + > + riscv_v_vstate_restore(current, task_pt_regs(current)); > + > + riscv_v_disable(); > + > + put_cpu_vector_context(); > +} > +EXPORT_SYMBOL_GPL(kernel_vector_end); > -- > 2.17.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/include/asm/simd.h b/arch/riscv/include/asm/simd.h new file mode 100644 index 000000000000..0c5ba555b460 --- /dev/null +++ b/arch/riscv/include/asm/simd.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org> + * Copyright (C) 2023 SiFive + */ + +#ifndef __ASM_SIMD_H +#define __ASM_SIMD_H + +#include <linux/compiler.h> +#include <linux/irqflags.h> +#include <linux/percpu.h> +#include <linux/preempt.h> +#include <linux/types.h> + +#ifdef CONFIG_RISCV_ISA_V + +DECLARE_PER_CPU(bool, vector_context_busy); + +/* + * may_use_simd - whether it is allowable at this time to issue vector + * instructions or access the vector register file + * + * Callers must not assume that the result remains true beyond the next + * preempt_enable() or return from softirq context. + */ +static __must_check inline bool may_use_simd(void) +{ + /* + * vector_context_busy is only set while preemption is disabled, + * and is clear whenever preemption is enabled. Since + * this_cpu_read() is atomic w.r.t. preemption, vector_context_busy + * cannot change under our feet -- if it's set we cannot be + * migrated, and if it's clear we cannot be migrated to a CPU + * where it is set. + */ + return !in_hardirq() && !in_nmi() && !this_cpu_read(vector_context_busy); +} + +#else /* ! CONFIG_RISCV_ISA_V */ + +static __must_check inline bool may_use_simd(void) +{ + return false; +} + +#endif /* ! CONFIG_RISCV_ISA_V */ + +#endif diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h index c5ee07b3df07..8b8ece690ea1 100644 --- a/arch/riscv/include/asm/vector.h +++ b/arch/riscv/include/asm/vector.h @@ -22,6 +22,10 @@ extern unsigned long riscv_v_vsize; int riscv_v_setup_vsize(void); bool riscv_v_first_use_handler(struct pt_regs *regs); +void kernel_vector_begin(void); +void kernel_vector_end(void); +void get_cpu_vector_context(void); +void put_cpu_vector_context(void); static __always_inline bool has_vector(void) { diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 95cf25d48405..0597bb668b6e 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -62,6 +62,7 @@ obj-$(CONFIG_MMU) += vdso.o vdso/ obj-$(CONFIG_RISCV_M_MODE) += traps_misaligned.o obj-$(CONFIG_FPU) += fpu.o obj-$(CONFIG_RISCV_ISA_V) += vector.o +obj-$(CONFIG_RISCV_ISA_V) += kernel_mode_vector.o obj-$(CONFIG_SMP) += smpboot.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_SMP) += cpu_ops.o diff --git a/arch/riscv/kernel/kernel_mode_vector.c b/arch/riscv/kernel/kernel_mode_vector.c new file mode 100644 index 000000000000..74936e108771 --- /dev/null +++ b/arch/riscv/kernel/kernel_mode_vector.c @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2012 ARM Ltd. + * Author: Catalin Marinas <catalin.marinas@arm.com> + * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org> + * Copyright (C) 2021 SiFive + */ +#include <linux/compiler.h> +#include <linux/irqflags.h> +#include <linux/percpu.h> +#include <linux/preempt.h> +#include <linux/types.h> + +#include <asm/vector.h> +#include <asm/switch_to.h> +#include <asm/simd.h> + +DEFINE_PER_CPU(bool, vector_context_busy); + +/* + * Claim ownership of the CPU vector context for use by the calling context. + * + * The caller may freely manipulate the vector context metadata until + * put_cpu_vector_context() is called. + */ +void get_cpu_vector_context(void) +{ + bool busy; + + preempt_disable(); + busy = __this_cpu_xchg(vector_context_busy, true); + + WARN_ON(busy); +} + +/* + * Release the CPU vector context. + * + * Must be called from a context in which get_cpu_vector_context() was + * previously called, with no call to put_cpu_vector_context() in the + * meantime. + */ +void put_cpu_vector_context(void) +{ + bool busy = __this_cpu_xchg(vector_context_busy, false); + + WARN_ON(!busy); + preempt_enable(); +} + +/* + * kernel_vector_begin(): obtain the CPU vector registers for use by the calling + * context + * + * Must not be called unless may_use_simd() returns true. + * Task context in the vector registers is saved back to memory as necessary. + * + * A matching call to kernel_vector_end() must be made before returning from the + * calling context. + * + * The caller may freely use the vector registers until kernel_vector_end() is + * called. + */ +void kernel_vector_begin(void) +{ + if (WARN_ON(!has_vector())) + return; + + BUG_ON(!may_use_simd()); + + get_cpu_vector_context(); + + riscv_v_vstate_save(current, task_pt_regs(current)); + + riscv_v_enable(); +} +EXPORT_SYMBOL_GPL(kernel_vector_begin); + +/* + * kernel_vector_end(): give the CPU vector registers back to the current task + * + * Must be called from a context in which kernel_vector_begin() was previously + * called, with no call to kernel_vector_end() in the meantime. + * + * The caller must not use the vector registers after this function is called, + * unless kernel_vector_begin() is called again in the meantime. + */ +void kernel_vector_end(void) +{ + if (WARN_ON(!has_vector())) + return; + + riscv_v_vstate_restore(current, task_pt_regs(current)); + + riscv_v_disable(); + + put_cpu_vector_context(); +} +EXPORT_SYMBOL_GPL(kernel_vector_end);