diff mbox series

[v4,5/7] riscv: dts: thead: Add TH1520 mmc controllers and sdhci clock

Message ID 20231101-th1520-mmc-v4-5-86e0216b5994@baylibre.com (mailing list archive)
State Superseded
Delegated to: Conor Dooley
Headers show
Series RISC-V: Add MMC support for TH1520 boards | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/vmtest-fixes-PR fail PR summary
conchuod/patch-5-test-1 success .github/scripts/patches/build_rv32_defconfig.sh
conchuod/patch-5-test-2 success .github/scripts/patches/build_rv64_clang_allmodconfig.sh
conchuod/patch-5-test-3 success .github/scripts/patches/build_rv64_gcc_allmodconfig.sh
conchuod/patch-5-test-4 success .github/scripts/patches/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-5-test-5 success .github/scripts/patches/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-5-test-6 success .github/scripts/patches/checkpatch.sh
conchuod/patch-5-test-7 success .github/scripts/patches/dtb_warn_rv64.sh
conchuod/patch-5-test-8 success .github/scripts/patches/header_inline.sh
conchuod/patch-5-test-9 success .github/scripts/patches/kdoc.sh
conchuod/patch-5-test-10 success .github/scripts/patches/module_param.sh
conchuod/patch-5-test-11 success .github/scripts/patches/verify_fixes.sh
conchuod/patch-5-test-12 success .github/scripts/patches/verify_signedoff.sh

Commit Message

Drew Fustini Nov. 2, 2023, 2:48 a.m. UTC
Add node for the SDHCI fixed clock. Add mmc0 node for the first mmc
controller instance which is typically connected to the eMMC device.
Add mmc1 node for the second mmc controller instance which is typically
connected to microSD slot.

Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index ff364709a6df..f5ec9326c4b8 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -134,6 +134,13 @@  uart_sclk: uart-sclk-clock {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <198000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -292,6 +299,22 @@  dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
+		mmc0: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+		};
+
+		mmc1: mmc@ffe7090000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+		};
+
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;