Message ID | 20231107155529.8368-1-palmer@rivosinc.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 28ea54bade76e2d47cb8cdb96e427cfb90d3eea7 |
Headers | show |
Series | RISC-V: Don't rely on positional structure initialization | expand |
Context | Check | Description |
---|---|---|
conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Tue, Nov 07, 2023 at 07:55:29AM -0800, Palmer Dabbelt wrote: > Without this I get a bunch of warnings along the lines of > > arch/riscv/kernel/module.c:535:26: error: positional initialization of field in 'struct' declared with 'designated_init' attribute [-Werror=designated-init] > 535 | [R_RISCV_32] = { apply_r_riscv_32_rela }, > > This just mades the member initializers explicit instead of positional. > I also aligned some of the table, but mostly just to make the batch > editing go faster. > > Fixes: 3bb2a41e5efd ("Merge patch series "riscv: Add remaining module relocations and tests"") > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > --- > arch/riscv/kernel/module.c | 125 +++++++++++++++++++------------------ > 1 file changed, 65 insertions(+), 60 deletions(-) > > diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c > index 4b339729d5ec..56a8c78e9e21 100644 > --- a/arch/riscv/kernel/module.c > +++ b/arch/riscv/kernel/module.c > @@ -532,69 +532,74 @@ static int apply_uleb128_accumulation(struct module *me, void *location, long bu > * This handles static linking only. > */ > static const struct relocation_handlers reloc_handlers[] = { > - [R_RISCV_32] = { apply_r_riscv_32_rela }, > - [R_RISCV_64] = { apply_r_riscv_64_rela }, > - [R_RISCV_RELATIVE] = { dynamic_linking_not_supported }, > - [R_RISCV_COPY] = { dynamic_linking_not_supported }, > - [R_RISCV_JUMP_SLOT] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_DTPMOD32] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_DTPMOD64] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_DTPREL32] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_DTPREL64] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_TPREL32] = { dynamic_linking_not_supported }, > - [R_RISCV_TLS_TPREL64] = { dynamic_linking_not_supported }, > + [R_RISCV_32] = { .reloc_handler = apply_r_riscv_32_rela }, > + [R_RISCV_64] = { .reloc_handler = apply_r_riscv_64_rela }, > + [R_RISCV_RELATIVE] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_COPY] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_JUMP_SLOT] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_DTPMOD32] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_DTPMOD64] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_DTPREL32] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_DTPREL64] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_TPREL32] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_TLS_TPREL64] = { .reloc_handler = dynamic_linking_not_supported }, > /* 12-15 undefined */ > - [R_RISCV_BRANCH] = { apply_r_riscv_branch_rela }, > - [R_RISCV_JAL] = { apply_r_riscv_jal_rela }, > - [R_RISCV_CALL] = { apply_r_riscv_call_rela }, > - [R_RISCV_CALL_PLT] = { apply_r_riscv_call_plt_rela }, > - [R_RISCV_GOT_HI20] = { apply_r_riscv_got_hi20_rela }, > - [R_RISCV_TLS_GOT_HI20] = { tls_not_supported }, > - [R_RISCV_TLS_GD_HI20] = { tls_not_supported }, > - [R_RISCV_PCREL_HI20] = { apply_r_riscv_pcrel_hi20_rela }, > - [R_RISCV_PCREL_LO12_I] = { apply_r_riscv_pcrel_lo12_i_rela }, > - [R_RISCV_PCREL_LO12_S] = { apply_r_riscv_pcrel_lo12_s_rela }, > - [R_RISCV_HI20] = { apply_r_riscv_hi20_rela }, > - [R_RISCV_LO12_I] = { apply_r_riscv_lo12_i_rela }, > - [R_RISCV_LO12_S] = { apply_r_riscv_lo12_s_rela }, > - [R_RISCV_TPREL_HI20] = { tls_not_supported }, > - [R_RISCV_TPREL_LO12_I] = { tls_not_supported }, > - [R_RISCV_TPREL_LO12_S] = { tls_not_supported }, > - [R_RISCV_TPREL_ADD] = { tls_not_supported }, > - [R_RISCV_ADD8] = { apply_r_riscv_add8_rela, apply_8_bit_accumulation }, > - [R_RISCV_ADD16] = { apply_r_riscv_add16_rela, > - apply_16_bit_accumulation }, > - [R_RISCV_ADD32] = { apply_r_riscv_add32_rela, > - apply_32_bit_accumulation }, > - [R_RISCV_ADD64] = { apply_r_riscv_add64_rela, > - apply_64_bit_accumulation }, > - [R_RISCV_SUB8] = { apply_r_riscv_sub8_rela, apply_8_bit_accumulation }, > - [R_RISCV_SUB16] = { apply_r_riscv_sub16_rela, > - apply_16_bit_accumulation }, > - [R_RISCV_SUB32] = { apply_r_riscv_sub32_rela, > - apply_32_bit_accumulation }, > - [R_RISCV_SUB64] = { apply_r_riscv_sub64_rela, > - apply_64_bit_accumulation }, > + [R_RISCV_BRANCH] = { .reloc_handler = apply_r_riscv_branch_rela }, > + [R_RISCV_JAL] = { .reloc_handler = apply_r_riscv_jal_rela }, > + [R_RISCV_CALL] = { .reloc_handler = apply_r_riscv_call_rela }, > + [R_RISCV_CALL_PLT] = { .reloc_handler = apply_r_riscv_call_plt_rela }, > + [R_RISCV_GOT_HI20] = { .reloc_handler = apply_r_riscv_got_hi20_rela }, > + [R_RISCV_TLS_GOT_HI20] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_TLS_GD_HI20] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_PCREL_HI20] = { .reloc_handler = apply_r_riscv_pcrel_hi20_rela }, > + [R_RISCV_PCREL_LO12_I] = { .reloc_handler = apply_r_riscv_pcrel_lo12_i_rela }, > + [R_RISCV_PCREL_LO12_S] = { .reloc_handler = apply_r_riscv_pcrel_lo12_s_rela }, > + [R_RISCV_HI20] = { .reloc_handler = apply_r_riscv_hi20_rela }, > + [R_RISCV_LO12_I] = { .reloc_handler = apply_r_riscv_lo12_i_rela }, > + [R_RISCV_LO12_S] = { .reloc_handler = apply_r_riscv_lo12_s_rela }, > + [R_RISCV_TPREL_HI20] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_TPREL_LO12_I] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_TPREL_LO12_S] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_TPREL_ADD] = { .reloc_handler = tls_not_supported }, > + [R_RISCV_ADD8] = { .reloc_handler = apply_r_riscv_add8_rela, > + .accumulate_handler = apply_8_bit_accumulation }, > + [R_RISCV_ADD16] = { .reloc_handler = apply_r_riscv_add16_rela, > + .accumulate_handler = apply_16_bit_accumulation }, > + [R_RISCV_ADD32] = { .reloc_handler = apply_r_riscv_add32_rela, > + .accumulate_handler = apply_32_bit_accumulation }, > + [R_RISCV_ADD64] = { .reloc_handler = apply_r_riscv_add64_rela, > + .accumulate_handler = apply_64_bit_accumulation }, > + [R_RISCV_SUB8] = { .reloc_handler = apply_r_riscv_sub8_rela, > + .accumulate_handler = apply_8_bit_accumulation }, > + [R_RISCV_SUB16] = { .reloc_handler = apply_r_riscv_sub16_rela, > + .accumulate_handler = apply_16_bit_accumulation }, > + [R_RISCV_SUB32] = { .reloc_handler = apply_r_riscv_sub32_rela, > + .accumulate_handler = apply_32_bit_accumulation }, > + [R_RISCV_SUB64] = { .reloc_handler = apply_r_riscv_sub64_rela, > + .accumulate_handler = apply_64_bit_accumulation }, > /* 41-42 reserved for future standard use */ > - [R_RISCV_ALIGN] = { apply_r_riscv_align_rela }, > - [R_RISCV_RVC_BRANCH] = { apply_r_riscv_rvc_branch_rela }, > - [R_RISCV_RVC_JUMP] = { apply_r_riscv_rvc_jump_rela }, > + [R_RISCV_ALIGN] = { .reloc_handler = apply_r_riscv_align_rela }, > + [R_RISCV_RVC_BRANCH] = { .reloc_handler = apply_r_riscv_rvc_branch_rela }, > + [R_RISCV_RVC_JUMP] = { .reloc_handler = apply_r_riscv_rvc_jump_rela }, > /* 46-50 reserved for future standard use */ > - [R_RISCV_RELAX] = { apply_r_riscv_relax_rela }, > - [R_RISCV_SUB6] = { apply_r_riscv_sub6_rela, apply_6_bit_accumulation }, > - [R_RISCV_SET6] = { apply_r_riscv_set6_rela, apply_6_bit_accumulation }, > - [R_RISCV_SET8] = { apply_r_riscv_set8_rela, apply_8_bit_accumulation }, > - [R_RISCV_SET16] = { apply_r_riscv_set16_rela, > - apply_16_bit_accumulation }, > - [R_RISCV_SET32] = { apply_r_riscv_set32_rela, > - apply_32_bit_accumulation }, > - [R_RISCV_32_PCREL] = { apply_r_riscv_32_pcrel_rela }, > - [R_RISCV_IRELATIVE] = { dynamic_linking_not_supported }, > - [R_RISCV_PLT32] = { apply_r_riscv_plt32_rela }, > - [R_RISCV_SET_ULEB128] = { apply_r_riscv_set_uleb128, > - apply_uleb128_accumulation }, > - [R_RISCV_SUB_ULEB128] = { apply_r_riscv_sub_uleb128, > - apply_uleb128_accumulation }, > + [R_RISCV_RELAX] = { .reloc_handler = apply_r_riscv_relax_rela }, > + [R_RISCV_SUB6] = { .reloc_handler = apply_r_riscv_sub6_rela, > + .accumulate_handler = apply_6_bit_accumulation }, > + [R_RISCV_SET6] = { .reloc_handler = apply_r_riscv_set6_rela, > + .accumulate_handler = apply_6_bit_accumulation }, > + [R_RISCV_SET8] = { .reloc_handler = apply_r_riscv_set8_rela, > + .accumulate_handler = apply_8_bit_accumulation }, > + [R_RISCV_SET16] = { .reloc_handler = apply_r_riscv_set16_rela, > + .accumulate_handler = apply_16_bit_accumulation }, > + [R_RISCV_SET32] = { .reloc_handler = apply_r_riscv_set32_rela, > + .accumulate_handler = apply_32_bit_accumulation }, > + [R_RISCV_32_PCREL] = { .reloc_handler = apply_r_riscv_32_pcrel_rela }, > + [R_RISCV_IRELATIVE] = { .reloc_handler = dynamic_linking_not_supported }, > + [R_RISCV_PLT32] = { .reloc_handler = apply_r_riscv_plt32_rela }, > + [R_RISCV_SET_ULEB128] = { .reloc_handler = apply_r_riscv_set_uleb128, > + .accumulate_handler = apply_uleb128_accumulation }, > + [R_RISCV_SUB_ULEB128] = { .reloc_handler = apply_r_riscv_sub_uleb128, > + .accumulate_handler = apply_uleb128_accumulation }, > /* 62-191 reserved for future standard use */ > /* 192-255 nonstandard ABI extensions */ > }; > -- > 2.42.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Hello: This patch was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Tue, 7 Nov 2023 07:55:29 -0800 you wrote: > Without this I get a bunch of warnings along the lines of > > arch/riscv/kernel/module.c:535:26: error: positional initialization of field in 'struct' declared with 'designated_init' attribute [-Werror=designated-init] > 535 | [R_RISCV_32] = { apply_r_riscv_32_rela }, > > This just mades the member initializers explicit instead of positional. > I also aligned some of the table, but mostly just to make the batch > editing go faster. > > [...] Here is the summary with links: - RISC-V: Don't rely on positional structure initialization https://git.kernel.org/riscv/c/28ea54bade76 You are awesome, thank you!
diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 4b339729d5ec..56a8c78e9e21 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/module.c @@ -532,69 +532,74 @@ static int apply_uleb128_accumulation(struct module *me, void *location, long bu * This handles static linking only. */ static const struct relocation_handlers reloc_handlers[] = { - [R_RISCV_32] = { apply_r_riscv_32_rela }, - [R_RISCV_64] = { apply_r_riscv_64_rela }, - [R_RISCV_RELATIVE] = { dynamic_linking_not_supported }, - [R_RISCV_COPY] = { dynamic_linking_not_supported }, - [R_RISCV_JUMP_SLOT] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_DTPMOD32] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_DTPMOD64] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_DTPREL32] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_DTPREL64] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_TPREL32] = { dynamic_linking_not_supported }, - [R_RISCV_TLS_TPREL64] = { dynamic_linking_not_supported }, + [R_RISCV_32] = { .reloc_handler = apply_r_riscv_32_rela }, + [R_RISCV_64] = { .reloc_handler = apply_r_riscv_64_rela }, + [R_RISCV_RELATIVE] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_COPY] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_JUMP_SLOT] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_DTPMOD32] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_DTPMOD64] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_DTPREL32] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_DTPREL64] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_TPREL32] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_TLS_TPREL64] = { .reloc_handler = dynamic_linking_not_supported }, /* 12-15 undefined */ - [R_RISCV_BRANCH] = { apply_r_riscv_branch_rela }, - [R_RISCV_JAL] = { apply_r_riscv_jal_rela }, - [R_RISCV_CALL] = { apply_r_riscv_call_rela }, - [R_RISCV_CALL_PLT] = { apply_r_riscv_call_plt_rela }, - [R_RISCV_GOT_HI20] = { apply_r_riscv_got_hi20_rela }, - [R_RISCV_TLS_GOT_HI20] = { tls_not_supported }, - [R_RISCV_TLS_GD_HI20] = { tls_not_supported }, - [R_RISCV_PCREL_HI20] = { apply_r_riscv_pcrel_hi20_rela }, - [R_RISCV_PCREL_LO12_I] = { apply_r_riscv_pcrel_lo12_i_rela }, - [R_RISCV_PCREL_LO12_S] = { apply_r_riscv_pcrel_lo12_s_rela }, - [R_RISCV_HI20] = { apply_r_riscv_hi20_rela }, - [R_RISCV_LO12_I] = { apply_r_riscv_lo12_i_rela }, - [R_RISCV_LO12_S] = { apply_r_riscv_lo12_s_rela }, - [R_RISCV_TPREL_HI20] = { tls_not_supported }, - [R_RISCV_TPREL_LO12_I] = { tls_not_supported }, - [R_RISCV_TPREL_LO12_S] = { tls_not_supported }, - [R_RISCV_TPREL_ADD] = { tls_not_supported }, - [R_RISCV_ADD8] = { apply_r_riscv_add8_rela, apply_8_bit_accumulation }, - [R_RISCV_ADD16] = { apply_r_riscv_add16_rela, - apply_16_bit_accumulation }, - [R_RISCV_ADD32] = { apply_r_riscv_add32_rela, - apply_32_bit_accumulation }, - [R_RISCV_ADD64] = { apply_r_riscv_add64_rela, - apply_64_bit_accumulation }, - [R_RISCV_SUB8] = { apply_r_riscv_sub8_rela, apply_8_bit_accumulation }, - [R_RISCV_SUB16] = { apply_r_riscv_sub16_rela, - apply_16_bit_accumulation }, - [R_RISCV_SUB32] = { apply_r_riscv_sub32_rela, - apply_32_bit_accumulation }, - [R_RISCV_SUB64] = { apply_r_riscv_sub64_rela, - apply_64_bit_accumulation }, + [R_RISCV_BRANCH] = { .reloc_handler = apply_r_riscv_branch_rela }, + [R_RISCV_JAL] = { .reloc_handler = apply_r_riscv_jal_rela }, + [R_RISCV_CALL] = { .reloc_handler = apply_r_riscv_call_rela }, + [R_RISCV_CALL_PLT] = { .reloc_handler = apply_r_riscv_call_plt_rela }, + [R_RISCV_GOT_HI20] = { .reloc_handler = apply_r_riscv_got_hi20_rela }, + [R_RISCV_TLS_GOT_HI20] = { .reloc_handler = tls_not_supported }, + [R_RISCV_TLS_GD_HI20] = { .reloc_handler = tls_not_supported }, + [R_RISCV_PCREL_HI20] = { .reloc_handler = apply_r_riscv_pcrel_hi20_rela }, + [R_RISCV_PCREL_LO12_I] = { .reloc_handler = apply_r_riscv_pcrel_lo12_i_rela }, + [R_RISCV_PCREL_LO12_S] = { .reloc_handler = apply_r_riscv_pcrel_lo12_s_rela }, + [R_RISCV_HI20] = { .reloc_handler = apply_r_riscv_hi20_rela }, + [R_RISCV_LO12_I] = { .reloc_handler = apply_r_riscv_lo12_i_rela }, + [R_RISCV_LO12_S] = { .reloc_handler = apply_r_riscv_lo12_s_rela }, + [R_RISCV_TPREL_HI20] = { .reloc_handler = tls_not_supported }, + [R_RISCV_TPREL_LO12_I] = { .reloc_handler = tls_not_supported }, + [R_RISCV_TPREL_LO12_S] = { .reloc_handler = tls_not_supported }, + [R_RISCV_TPREL_ADD] = { .reloc_handler = tls_not_supported }, + [R_RISCV_ADD8] = { .reloc_handler = apply_r_riscv_add8_rela, + .accumulate_handler = apply_8_bit_accumulation }, + [R_RISCV_ADD16] = { .reloc_handler = apply_r_riscv_add16_rela, + .accumulate_handler = apply_16_bit_accumulation }, + [R_RISCV_ADD32] = { .reloc_handler = apply_r_riscv_add32_rela, + .accumulate_handler = apply_32_bit_accumulation }, + [R_RISCV_ADD64] = { .reloc_handler = apply_r_riscv_add64_rela, + .accumulate_handler = apply_64_bit_accumulation }, + [R_RISCV_SUB8] = { .reloc_handler = apply_r_riscv_sub8_rela, + .accumulate_handler = apply_8_bit_accumulation }, + [R_RISCV_SUB16] = { .reloc_handler = apply_r_riscv_sub16_rela, + .accumulate_handler = apply_16_bit_accumulation }, + [R_RISCV_SUB32] = { .reloc_handler = apply_r_riscv_sub32_rela, + .accumulate_handler = apply_32_bit_accumulation }, + [R_RISCV_SUB64] = { .reloc_handler = apply_r_riscv_sub64_rela, + .accumulate_handler = apply_64_bit_accumulation }, /* 41-42 reserved for future standard use */ - [R_RISCV_ALIGN] = { apply_r_riscv_align_rela }, - [R_RISCV_RVC_BRANCH] = { apply_r_riscv_rvc_branch_rela }, - [R_RISCV_RVC_JUMP] = { apply_r_riscv_rvc_jump_rela }, + [R_RISCV_ALIGN] = { .reloc_handler = apply_r_riscv_align_rela }, + [R_RISCV_RVC_BRANCH] = { .reloc_handler = apply_r_riscv_rvc_branch_rela }, + [R_RISCV_RVC_JUMP] = { .reloc_handler = apply_r_riscv_rvc_jump_rela }, /* 46-50 reserved for future standard use */ - [R_RISCV_RELAX] = { apply_r_riscv_relax_rela }, - [R_RISCV_SUB6] = { apply_r_riscv_sub6_rela, apply_6_bit_accumulation }, - [R_RISCV_SET6] = { apply_r_riscv_set6_rela, apply_6_bit_accumulation }, - [R_RISCV_SET8] = { apply_r_riscv_set8_rela, apply_8_bit_accumulation }, - [R_RISCV_SET16] = { apply_r_riscv_set16_rela, - apply_16_bit_accumulation }, - [R_RISCV_SET32] = { apply_r_riscv_set32_rela, - apply_32_bit_accumulation }, - [R_RISCV_32_PCREL] = { apply_r_riscv_32_pcrel_rela }, - [R_RISCV_IRELATIVE] = { dynamic_linking_not_supported }, - [R_RISCV_PLT32] = { apply_r_riscv_plt32_rela }, - [R_RISCV_SET_ULEB128] = { apply_r_riscv_set_uleb128, - apply_uleb128_accumulation }, - [R_RISCV_SUB_ULEB128] = { apply_r_riscv_sub_uleb128, - apply_uleb128_accumulation }, + [R_RISCV_RELAX] = { .reloc_handler = apply_r_riscv_relax_rela }, + [R_RISCV_SUB6] = { .reloc_handler = apply_r_riscv_sub6_rela, + .accumulate_handler = apply_6_bit_accumulation }, + [R_RISCV_SET6] = { .reloc_handler = apply_r_riscv_set6_rela, + .accumulate_handler = apply_6_bit_accumulation }, + [R_RISCV_SET8] = { .reloc_handler = apply_r_riscv_set8_rela, + .accumulate_handler = apply_8_bit_accumulation }, + [R_RISCV_SET16] = { .reloc_handler = apply_r_riscv_set16_rela, + .accumulate_handler = apply_16_bit_accumulation }, + [R_RISCV_SET32] = { .reloc_handler = apply_r_riscv_set32_rela, + .accumulate_handler = apply_32_bit_accumulation }, + [R_RISCV_32_PCREL] = { .reloc_handler = apply_r_riscv_32_pcrel_rela }, + [R_RISCV_IRELATIVE] = { .reloc_handler = dynamic_linking_not_supported }, + [R_RISCV_PLT32] = { .reloc_handler = apply_r_riscv_plt32_rela }, + [R_RISCV_SET_ULEB128] = { .reloc_handler = apply_r_riscv_set_uleb128, + .accumulate_handler = apply_uleb128_accumulation }, + [R_RISCV_SUB_ULEB128] = { .reloc_handler = apply_r_riscv_sub_uleb128, + .accumulate_handler = apply_uleb128_accumulation }, /* 62-191 reserved for future standard use */ /* 192-255 nonstandard ABI extensions */ };
Without this I get a bunch of warnings along the lines of arch/riscv/kernel/module.c:535:26: error: positional initialization of field in 'struct' declared with 'designated_init' attribute [-Werror=designated-init] 535 | [R_RISCV_32] = { apply_r_riscv_32_rela }, This just mades the member initializers explicit instead of positional. I also aligned some of the table, but mostly just to make the batch editing go faster. Fixes: 3bb2a41e5efd ("Merge patch series "riscv: Add remaining module relocations and tests"") Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> --- arch/riscv/kernel/module.c | 125 +++++++++++++++++++------------------ 1 file changed, 65 insertions(+), 60 deletions(-)