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[2/2] riscv: dts: sophgo: set pinctrl for uart0

Message ID 20231113005702.2467-3-jszhang@kernel.org (mailing list archive)
State Changes Requested
Delegated to: Conor Dooley
Headers show
Series riscv: sophgo: add pinctrl support for cv1800b | expand

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict

Commit Message

Jisheng Zhang Nov. 13, 2023, 12:57 a.m. UTC
Although the mux function is uart by default, add it for
completeness.

Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
 arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
index 3af9e34b3bc7..cc10688908bc 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
+++ b/arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts
@@ -33,6 +33,17 @@  &osc {
 	clock-frequency = <25000000>;
 };
 
+&pinctrl0 {
+	uart0_pins: uart0-pins {
+		pinctrl-single,pins = <
+			0x24 MUX_M0 /* UART0_TX */
+			0x28 MUX_M0 /* UART0_RX */
+		>;
+	};
+};
+
 &uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
 	status = "okay";
 };