@@ -1,12 +1,12 @@
# SPDX-License-Identifier: GPL-2.0
-config CLK_STARFIVE_JH71X0
+config CLK_STARFIVE_COMMON
bool
config CLK_STARFIVE_JH7100
bool "StarFive JH7100 clock support"
depends on ARCH_STARFIVE || COMPILE_TEST
- select CLK_STARFIVE_JH71X0
+ select CLK_STARFIVE_COMMON
default ARCH_STARFIVE
help
Say yes here to support the clock controller on the StarFive JH7100
@@ -15,7 +15,7 @@ config CLK_STARFIVE_JH7100
config CLK_STARFIVE_JH7100_AUDIO
tristate "StarFive JH7100 audio clock support"
depends on CLK_STARFIVE_JH7100
- select CLK_STARFIVE_JH71X0
+ select CLK_STARFIVE_COMMON
default m if ARCH_STARFIVE
help
Say Y or M here to support the audio clocks on the StarFive JH7100
@@ -33,7 +33,7 @@ config CLK_STARFIVE_JH7110_SYS
bool "StarFive JH7110 system clock support"
depends on ARCH_STARFIVE || COMPILE_TEST
select AUXILIARY_BUS
- select CLK_STARFIVE_JH71X0
+ select CLK_STARFIVE_COMMON
select RESET_STARFIVE_JH7110 if RESET_CONTROLLER
select CLK_STARFIVE_JH7110_PLL
default ARCH_STARFIVE
@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_CLK_STARFIVE_JH71X0) += clk-starfive-jh71x0.o
+obj-$(CONFIG_CLK_STARFIVE_COMMON) += clk-starfive-common.o
obj-$(CONFIG_CLK_STARFIVE_JH7100) += clk-starfive-jh7100.o
obj-$(CONFIG_CLK_STARFIVE_JH7100_AUDIO) += clk-starfive-jh7100-audio.o
similarity index 99%
rename from drivers/clk/starfive/clk-starfive-jh71x0.c
rename to drivers/clk/starfive/clk-starfive-common.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * StarFive JH71X0 Clock Generator Driver
+ * StarFive Clock Generator Driver
*
* Copyright (C) 2021-2022 Emil Renner Berthing <kernel@esmil.dk>
*/
@@ -10,7 +10,7 @@
#include <linux/device.h>
#include <linux/io.h>
-#include "clk-starfive-jh71x0.h"
+#include "clk-starfive-common.h"
static struct jh71x0_clk *jh71x0_clk_from(struct clk_hw *hw)
{
similarity index 97%
rename from drivers/clk/starfive/clk-starfive-jh71x0.h
rename to drivers/clk/starfive/clk-starfive-common.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __CLK_STARFIVE_JH71X0_H
-#define __CLK_STARFIVE_JH71X0_H
+#ifndef __CLK_STARFIVE_COMMON_H
+#define __CLK_STARFIVE_COMMON_H
#include <linux/bits.h>
#include <linux/clk-provider.h>
@@ -15,7 +15,7 @@
#include <dt-bindings/clock/starfive-jh7100-audio.h>
-#include "clk-starfive-jh71x0.h"
+#include "clk-starfive-common.h"
/* external clocks */
#define JH7100_AUDCLK_AUDIO_SRC (JH7100_AUDCLK_END + 0)
@@ -15,7 +15,7 @@
#include <dt-bindings/clock/starfive-jh7100.h>
-#include "clk-starfive-jh71x0.h"
+#include "clk-starfive-common.h"
/* external clocks */
#define JH7100_CLK_OSC_SYS (JH7100_CLK_END + 0)
@@ -2,7 +2,7 @@
#ifndef __CLK_STARFIVE_JH7110_H
#define __CLK_STARFIVE_JH7110_H
-#include "clk-starfive-jh71x0.h"
+#include "clk-starfive-common.h"
/* top clocks of ISP/VOUT domain from JH7110 SYSCRG */
struct jh7110_top_sysclk {