diff mbox series

[v7,3/3] riscv: dts: sophgo: add rtc dt node for CV1800

Message ID 20240122080631.2880-2-qiujingbao.dlmu@gmail.com (mailing list archive)
State Changes Requested
Delegated to: Conor Dooley
Headers show
Series riscv: rtc: sophgo: add rtc support for CV1800 | expand

Checks

Context Check Description
conchuod/vmtest-fixes-PR fail merge-conflict

Commit Message

Jingbao Qiu Jan. 22, 2024, 8:06 a.m. UTC 
Add the rtc device tree node to cv1800 SoC.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Emil Renner Berthing Jan. 22, 2024, 1:25 p.m. UTC | #1 
Jingbao Qiu wrote:
> Add the rtc device tree node to cv1800 SoC.
>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index df40e87ee063..0cd7eb9a3048 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -119,5 +119,12 @@ clint: timer@74000000 {
>  			reg = <0x74000000 0x10000>;
>  			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>  		};
> +
> +		rtc: rtc@5025000 {
> +			compatible = "sophgo,cv1800-rtc";
> +			reg = <0x5025000 0x2000>;
> +			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&osc>;
> +		};

Before this patch it looks like the nodes are sorted by their address,
but this would break it.

>  	};
>  };
> --
> 2.43.0
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Jingbao Qiu Jan. 23, 2024, 1:24 a.m. UTC | #2 
On Mon, Jan 22, 2024 at 9:25 PM Emil Renner Berthing
<emil.renner.berthing@canonical.com> wrote:
>
> Jingbao Qiu wrote:
> > Add the rtc device tree node to cv1800 SoC.
> >
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index df40e87ee063..0cd7eb9a3048 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -119,5 +119,12 @@ clint: timer@74000000 {
> >                       reg = <0x74000000 0x10000>;
> >                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
> >               };
> > +
> > +             rtc: rtc@5025000 {
> > +                     compatible = "sophgo,cv1800-rtc";
> > +                     reg = <0x5025000 0x2000>;
> > +                     interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&osc>;
> > +             };
>
> Before this patch it looks like the nodes are sorted by their address,
> but this would break it.

Thanks, I will fix it.

Best regards,
Jingbao Qiu
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index df40e87ee063..0cd7eb9a3048 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -119,5 +119,12 @@  clint: timer@74000000 {
 			reg = <0x74000000 0x10000>;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
 		};
+
+		rtc: rtc@5025000 {
+			compatible = "sophgo,cv1800-rtc";
+			reg = <0x5025000 0x2000>;
+			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc>;
+		};
 	};
 };