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Mon, 29 Jan 2024 01:01:54 +0000 Received: from BJXPR01MB0855.CHNPR01.prod.partner.outlook.cn ([fe80::1ea1:19d5:efef:6fc6]) by BJXPR01MB0855.CHNPR01.prod.partner.outlook.cn ([fe80::1ea1:19d5:efef:6fc6%4]) with mapi id 15.20.7228.029; Mon, 29 Jan 2024 01:01:54 +0000 From: Minda Chen To: Conor Dooley , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , Daire McNamara , Emil Renner Berthing , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v14,RESEND 18/22] PCI: plda: Add host init/deinit and map bus functions Date: Mon, 29 Jan 2024 09:01:38 +0800 Message-Id: <20240129010142.3732-3-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240129010142.3732-1-minda.chen@starfivetech.com> References: <20240129010142.3732-1-minda.chen@starfivetech.com> X-ClientProxiedBy: SH0PR01CA0003.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:5::15) To BJXPR01MB0855.CHNPR01.prod.partner.outlook.cn (2406:e500:c211:18::12) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BJXPR01MB0855:EE_|BJXPR01MB0552:EE_ X-MS-Office365-Filtering-Correlation-Id: bd972af7-7ac2-4dcd-35f6-08dc2065e24c X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: l+pZrWumIDBOrVFOxTlTG0hzphBMeG3tqvm+IV4fZDZ0EsDISDTORnsMKLw1mxTfXKrW2ezGejaO2MKoel3fU7fAanoLWqZ3Sbk8TX61KQOulkX0Fe2FOXUJaeUzMABTJJgJI0SjS8k9hu5CRVFzaAZK+Qajcl2Ox7MvKdJGKhkCKwjM1n9iRBaEfosufntgKzp8CiUABaYhQE3aBkYcxQvi/oMEPsXfTGixR6r+1X8sFS1g/8NlGx5CmB8PqC9WfphoIFmZCJbSm3ijYpYLHSWT+6IkdPnnkvrBymOp/qJyIEZsKj3gcCB1Crb6YfMx0L6eLsJslFgW0ohureWxW6J0dZkCvihbwxX7HeojAHcIHIFOamimwKU4/ZEeCkUUNlbbM0UqKtXsjsVJY8XSv5JxtDgcK1/llwT9L2jXa2n8J3gYmEo3Dn2YGKAB/AYKGNqWjW/xj2n5wdv1v2X4oE2kx1bTCCROASY0VlyGd5uU2sdC42NL6IYKR2pgf8rLuhIIv6gxxS9Gf2yLFpGoNUnajSc9raJHzbrARBJe8rjl9yT3AG1rukziYKeGbAufGIPAh0ufqzgzvOBfuSi2IHRURA+iQASVjPLAACeC6afch2lLKhAgbXcRIDRroFVn3SJmBnPnAtrygsNhW/lQ+DryrGEbvHRFYvLzSsSk4LKHsg2FZwiayzDLQndcEAuMwRkbjko+iYQbB9tZpliYlr9Jhwg0StljC6gqycKw8qxBvpM8QykTOIAR0VxqINyPA9SdNZ4x2tZ/VoAypYdXyCALgtaoTy7LRNOdKHOwF0FlKgn71QXNFn+XnJwowzfFSU4jMc2JxbcrBHxAlg5n2Z90h6OYSCKbMFDjpmcJtBRKczfzu8o5N3R1ONG2wEZqCkByEcn1xOu7lvOxSEncQ04U7JNt9h80oT7Um8ZBh2pUkDgXrZ6br0hF58844oDIbdwLCe8IyLSTuy/wD603W4vbF5xhQdj4ltrs0fjFCaZCoWQmguSiz+W2NcVNXb2rM7X1BUqbucIRobyzVCVCpPgeFGyA2DD0RzbDSqGvIMmJkoYzv2cTnPgjg50NT9FlOZwVkc5ZNLFx/bMdbu6jx7H/Uoz47CcZBw3P2x4sPZQ3qfIZ+egTzzOGI20mWqoUVXSHU6eIm4oEOxqAlHNDn2Lyg0o7jcgrWfzZs5cTCMfkg/FSLGREDRdQzWk4fujtGZP09mDw5ySzAxcb2mK8aQHVLUkyVNH6yR2vT6Ilxpvujf5CfWAxN0xZa+Y+7ln5juegWOXB6ZJ/c0/aQl6AlPWUu1sf1muzpC6CrtdPwkLlSo/LF3CpuJDGRJ53a1oDT/pRJXaDw4SR1emTlXna4CN12VT7SCkmGExrd6jBlMjiAN1Izo7sck6vNI/B/PUXTsep+FSNrULYHgqPVWEuNt2Q8+JW4XHyrz9YHrvKbr4iss3FMjZvvxlzz86L5UqQ4ZFKXyOh2xBcwdCromTK1OX5AY3QSHZeeH+xuUow6PGMiWsG7vrYJqYUAZCsGFAAFcWvKFR3QHhL1QOTSBIUqQ7NO99L3xC1Zb7hFZGoojKTaPlU4R/XbcPDk6GQ51Rxee+kXriG/hd3RojiH1r62A== X-OriginatorOrg: starfivetech.com X-MS-Exchange-CrossTenant-Network-Message-Id: bd972af7-7ac2-4dcd-35f6-08dc2065e24c X-MS-Exchange-CrossTenant-AuthSource: BJXPR01MB0855.CHNPR01.prod.partner.outlook.cn X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jan 2024 01:01:54.1270 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: V/FK9t72sCKtizRANn7ZiY78Q26a5g0YSDz2YJnJ37yenFz2eN/cyYzNUwh+PPsvDo9RNOb5exYi0CXDZt8c6dwXNvQnsKdcDcDe/vDiAf4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BJXPR01MB0552 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240128_170202_457340_8B16F52F X-CRM114-Status: GOOD ( 18.03 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add PLDA host plda_pcie_host_init()/plda_pcie_host_deinit() and map bus function. So vendor can use it to init PLDA PCIe host core. Signed-off-by: Minda Chen Reviewed-by: Mason Huo --- drivers/pci/controller/plda/pcie-plda-host.c | 131 +++++++++++++++++-- drivers/pci/controller/plda/pcie-plda.h | 22 ++++ 2 files changed, 139 insertions(+), 14 deletions(-) diff --git a/drivers/pci/controller/plda/pcie-plda-host.c b/drivers/pci/controller/plda/pcie-plda-host.c index a040e7e5492f..a18923d7cea6 100644 --- a/drivers/pci/controller/plda/pcie-plda-host.c +++ b/drivers/pci/controller/plda/pcie-plda-host.c @@ -3,6 +3,7 @@ * PLDA PCIe XpressRich host controller driver * * Copyright (C) 2023 Microchip Co. Ltd + * StarFive Co. Ltd * * Author: Daire McNamara */ @@ -15,6 +16,15 @@ #include "pcie-plda.h" +void __iomem *plda_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, + int where) +{ + struct plda_pcie_rp *pcie = bus->sysdata; + + return pcie->config_base + PCIE_ECAM_OFFSET(bus->number, devfn, where); +} +EXPORT_SYMBOL_GPL(plda_pcie_map_bus); + static void plda_handle_msi(struct irq_desc *desc) { struct plda_pcie_rp *port = irq_desc_get_handler_data(desc); @@ -420,9 +430,7 @@ int plda_init_interrupts(struct platform_device *pdev, const struct plda_event *event) { struct device *dev = &pdev->dev; - int irq; - int intx_irq, msi_irq, event_irq; - int ret; + int event_irq, ret; u32 i; if (!port->event_ops) @@ -437,8 +445,8 @@ int plda_init_interrupts(struct platform_device *pdev, return ret; } - irq = platform_get_irq(pdev, 0); - if (irq < 0) + port->irq = platform_get_irq(pdev, 0); + if (port->irq < 0) return -ENODEV; for_each_set_bit(i, &port->events_bitmap, port->num_events) { @@ -461,26 +469,26 @@ int plda_init_interrupts(struct platform_device *pdev, } } - intx_irq = irq_create_mapping(port->event_domain, - event->intx_event); - if (!intx_irq) { + port->intx_irq = irq_create_mapping(port->event_domain, + event->intx_event); + if (!port->intx_irq) { dev_err(dev, "failed to map INTx interrupt\n"); return -ENXIO; } /* Plug the INTx chained handler */ - irq_set_chained_handler_and_data(intx_irq, plda_handle_intx, port); + irq_set_chained_handler_and_data(port->intx_irq, plda_handle_intx, port); - msi_irq = irq_create_mapping(port->event_domain, - event->msi_event); - if (!msi_irq) + port->msi_irq = irq_create_mapping(port->event_domain, + event->msi_event); + if (!port->msi_irq) return -ENXIO; /* Plug the MSI chained handler */ - irq_set_chained_handler_and_data(msi_irq, plda_handle_msi, port); + irq_set_chained_handler_and_data(port->msi_irq, plda_handle_msi, port); /* Plug the main event chained handler */ - irq_set_chained_handler_and_data(irq, plda_handle_event, port); + irq_set_chained_handler_and_data(port->irq, plda_handle_event, port); return 0; } @@ -546,3 +554,98 @@ int plda_pcie_setup_iomems(struct pci_host_bridge *bridge, return 0; } EXPORT_SYMBOL_GPL(plda_pcie_setup_iomems); + +static void plda_pcie_irq_domain_deinit(struct plda_pcie_rp *pcie) +{ + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + irq_set_chained_handler_and_data(pcie->msi_irq, NULL, NULL); + irq_set_chained_handler_and_data(pcie->intx_irq, NULL, NULL); + + irq_domain_remove(pcie->msi.msi_domain); + irq_domain_remove(pcie->msi.dev_domain); + + irq_domain_remove(pcie->intx_domain); + irq_domain_remove(pcie->event_domain); +} + +int plda_pcie_host_init(struct plda_pcie_rp *port, struct pci_ops *ops, + const struct plda_event *plda_event) +{ + struct device *dev = port->dev; + struct pci_host_bridge *bridge; + struct platform_device *pdev = to_platform_device(dev); + struct resource *cfg_res; + int ret; + + pdev = to_platform_device(dev); + + port->bridge_addr = + devm_platform_ioremap_resource_byname(pdev, "apb"); + + if (IS_ERR(port->bridge_addr)) + return dev_err_probe(dev, PTR_ERR(port->bridge_addr), + "failed to map reg memory\n"); + + cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg"); + if (!cfg_res) + return dev_err_probe(dev, -ENODEV, + "failed to get config memory\n"); + + port->config_base = devm_ioremap_resource(dev, cfg_res); + if (IS_ERR(port->config_base)) + return dev_err_probe(dev, PTR_ERR(port->config_base), + "failed to map config memory\n"); + + bridge = devm_pci_alloc_host_bridge(dev, 0); + if (!bridge) + return dev_err_probe(dev, -ENOMEM, + "failed to alloc bridge\n"); + + if (port->host_ops && port->host_ops->host_init) { + ret = port->host_ops->host_init(port); + if (ret) + return ret; + } + + port->bridge = bridge; + plda_pcie_setup_window(port->bridge_addr, 0, cfg_res->start, 0, + resource_size(cfg_res)); + plda_pcie_setup_iomems(bridge, port); + plda_set_default_msi(&port->msi); + ret = plda_init_interrupts(pdev, port, plda_event); + if (ret) + goto err_host; + + /* Set default bus ops */ + bridge->ops = ops; + bridge->sysdata = port; + + ret = pci_host_probe(bridge); + if (ret < 0) { + dev_err_probe(dev, ret, "failed to probe pci host\n"); + goto err_probe; + } + + return ret; + +err_probe: + plda_pcie_irq_domain_deinit(port); +err_host: + if (port->host_ops && port->host_ops->host_deinit) + port->host_ops->host_deinit(port); + + return ret; +} +EXPORT_SYMBOL_GPL(plda_pcie_host_init); + +void plda_pcie_host_deinit(struct plda_pcie_rp *port) +{ + pci_stop_root_bus(port->bridge->bus); + pci_remove_root_bus(port->bridge->bus); + + plda_pcie_irq_domain_deinit(port); + + if (port->host_ops && port->host_ops->host_deinit) + port->host_ops->host_deinit(port); +} +EXPORT_SYMBOL_GPL(plda_pcie_host_deinit); diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h index 443109d04d59..7b69891700a4 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -141,6 +141,11 @@ struct plda_event_ops { u32 (*get_events)(struct plda_pcie_rp *pcie); }; +struct plda_pcie_host_ops { + int (*host_init)(struct plda_pcie_rp *pcie); + void (*host_deinit)(struct plda_pcie_rp *pcie); +}; + struct plda_msi { struct mutex lock; /* Protect used bitmap */ struct irq_domain *msi_domain; @@ -152,14 +157,20 @@ struct plda_msi { struct plda_pcie_rp { struct device *dev; + struct pci_host_bridge *bridge; struct irq_domain *intx_domain; struct irq_domain *event_domain; raw_spinlock_t lock; struct plda_msi msi; const struct plda_event_ops *event_ops; const struct irq_chip *event_irq_chip; + const struct plda_pcie_host_ops *host_ops; void __iomem *bridge_addr; + void __iomem *config_base; unsigned long events_bitmap; + int irq; + int msi_irq; + int intx_irq; int num_events; }; @@ -170,6 +181,8 @@ struct plda_event { int msi_event; }; +void __iomem *plda_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, + int where); int plda_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp *port, const struct plda_event *event); @@ -178,4 +191,13 @@ void plda_pcie_setup_window(void __iomem *bridge_base_addr, u32 index, size_t size); int plda_pcie_setup_iomems(struct pci_host_bridge *bridge, struct plda_pcie_rp *port); +int plda_pcie_host_init(struct plda_pcie_rp *port, struct pci_ops *ops, + const struct plda_event *plda_event); +void plda_pcie_host_deinit(struct plda_pcie_rp *pcie); + +static inline void plda_set_default_msi(struct plda_msi *msi) +{ + msi->vector_phy = IMSI_ADDR; + msi->num_vectors = PLDA_MAX_NUM_MSI_IRQS; +} #endif