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Mon, 29 Jan 2024 07:16:28 -0800 (PST) Received: from prasmi.home ([2a00:23c8:2500:a01:5616:a18c:ea50:2995]) by smtp.gmail.com with ESMTPSA id h4-20020adfa4c4000000b00337d4eed87asm8397774wrb.115.2024.01.29.07.16.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jan 2024 07:16:27 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Thomas Gleixner , Geert Uytterhoeven , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Claudiu Beznea , Lad Prabhakar Subject: [PATCH 1/5] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/Five SoC Date: Mon, 29 Jan 2024 15:16:14 +0000 Message-Id: <20240129151618.90922-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240129151618.90922-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240129151618.90922-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240129_071630_101718_FB711BAC X-CRM114-Status: UNSURE ( 9.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Lad Prabhakar Document RZ/Five (R9A07G043F) IRQC bindings. The IRQC block on RZ/Five SoC is almost identical to one found on the RZ/G2L SoC with below differences, * Additional BUS error interrupt * Additional ECCRAM error interrupt * Has additional mask control registers for NMI/IRQ/TINT Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five SoC. Signed-off-by: Lad Prabhakar --- .../renesas,rzg2l-irqc.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml index d3b5aec0a3f7..3abc01e48934 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml @@ -23,6 +23,7 @@ properties: compatible: items: - enum: + - renesas,r9a07g043f-irqc # RZ/Five - renesas,r9a07g043u-irqc # RZ/G2UL - renesas,r9a07g044-irqc # RZ/G2{L,LC} - renesas,r9a07g054-irqc # RZ/V2L @@ -88,6 +89,12 @@ properties: - description: GPIO interrupt, TINT30 - description: GPIO interrupt, TINT31 - description: Bus error interrupt + - description: ECCRAM0 TIE1 interrupt + - description: ECCRAM0 TIE2 interrupt + - description: ECCRAM0 overflow interrupt + - description: ECCRAM1 TIE1 interrupt + - description: ECCRAM1 TIE2 interrupt + - description: ECCRAM1 overflow interrupt interrupt-names: minItems: 41 @@ -134,6 +141,12 @@ properties: - const: tint30 - const: tint31 - const: bus-err + - const: eccram0-tie1 + - const: eccram0-tie2 + - const: eccram0-ovf + - const: eccram1-tie1 + - const: eccram1-tie2 + - const: eccram1-ovf clocks: maxItems: 2 @@ -180,6 +193,20 @@ allOf: required: - interrupt-names + - if: + properties: + compatible: + contains: + const: renesas,r9a07g043f-irqc + then: + properties: + interrupts: + minItems: 48 + interrupt-names: + minItems: 48 + required: + - interrupt-names + unevaluatedProperties: false examples: