| Message ID | 20240131125920.2879433-4-privatesub2@gmail.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add support for Allwinner PWM on D1/T113s/R329 SoCs | expand |
On Wed, 31 Jan 2024 15:59:16 +0300 Aleksandr Shubin <privatesub2@gmail.com> wrote: Hi, > D1 and T113s contain a pwm controller with 8 channels. > This controller is supported by the sun20i-pwm driver. > > Add a device tree node for it. > > Signed-off-by: Aleksandr Shubin <privatesub2@gmail.com> Compared against the manual: Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > index 5a9d7f5a75b4..435a1e66aa6a 100644 > --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi > @@ -145,6 +145,18 @@ uart3_pb_pins: uart3-pb-pins { > }; > }; > > + pwm: pwm@2000c00 { > + compatible = "allwinner,sun20i-d1-pwm"; > + reg = <0x02000c00 0x400>; > + clocks = <&ccu CLK_BUS_PWM>, > + <&dcxo>, > + <&ccu CLK_APB0>; > + clock-names = "bus", "hosc", "apb0"; > + resets = <&ccu RST_BUS_PWM>; > + status = "disabled"; > + #pwm-cells = <0x3>; > + }; > + > ccu: clock-controller@2001000 { > compatible = "allwinner,sun20i-d1-ccu"; > reg = <0x2001000 0x1000>;
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 5a9d7f5a75b4..435a1e66aa6a 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -145,6 +145,18 @@ uart3_pb_pins: uart3-pb-pins { }; }; + pwm: pwm@2000c00 { + compatible = "allwinner,sun20i-d1-pwm"; + reg = <0x02000c00 0x400>; + clocks = <&ccu CLK_BUS_PWM>, + <&dcxo>, + <&ccu CLK_APB0>; + clock-names = "bus", "hosc", "apb0"; + resets = <&ccu RST_BUS_PWM>; + status = "disabled"; + #pwm-cells = <0x3>; + }; + ccu: clock-controller@2001000 { compatible = "allwinner,sun20i-d1-ccu"; reg = <0x2001000 0x1000>;
D1 and T113s contain a pwm controller with 8 channels. This controller is supported by the sun20i-pwm driver. Add a device tree node for it. Signed-off-by: Aleksandr Shubin <privatesub2@gmail.com> --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)