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AJvYcCXrV2+esElG70m/ztfgjzKEZmkQKk4zSNNq+Dxxu8nqdRX8idCOHrJ7yhJDlcYOT8cHrHnkzYMcLEScGFGfHlV3Yt0LYLXw+peEGzbQNPVq X-Gm-Message-State: AOJu0YxReKQuAXwsAymhB0vLJ5m2wphIrvom5UQKzfeI8qJ33GNkzjH5 TdeOjQzqDJ8YlM4ETasOqs2oPFqq+ZDQwL9KiuFibKD/nMO+aMaH X-Google-Smtp-Source: AGHT+IFOug+prJyXuRGFeVODmozS4fHIyHcN5UlA0KXkTsIv7Ms3lGTNvz7tnZ/bHi5vnYPctGNhqw== X-Received: by 2002:a17:90b:c12:b0:29b:b736:71b8 with SMTP id bp18-20020a17090b0c1200b0029bb73671b8mr1166414pjb.28.1710410509361; Thu, 14 Mar 2024 03:01:49 -0700 (PDT) Received: from localhost ([2001:da8:a801:69b2:6cee:23f3:5da6:de15]) by smtp.gmail.com with ESMTPSA id bo9-20020a17090b090900b0029bfac322aasm483186pjb.30.2024.03.14.03.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 03:01:49 -0700 (PDT) From: Jingbao Qiu To: u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dlan@gentoo.org, inochiama@outlook.com, Jingbao Qiu , Krzysztof Kozlowski Subject: [PATCH v5 1/2] dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC Date: Thu, 14 Mar 2024 18:01:30 +0800 Message-Id: <20240314100131.323540-2-qiujingbao.dlmu@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240314100131.323540-1-qiujingbao.dlmu@gmail.com> References: <20240314100131.323540-1-qiujingbao.dlmu@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240314_030151_457705_A961ED79 X-CRM114-Status: GOOD ( 10.61 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add devicetree binding to describe the PWM for Sophgo CV1800 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jingbao Qiu --- .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml b/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml new file mode 100644 index 000000000000..b5b819d780f1 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/sophgo,cv1800-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800 PWM controller + +maintainers: + - Jingbao Qiu + +description: + The chip provides a set of four independent PWM channel outputs. + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: sophgo,cv1800-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 3 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + pwm0: pwm@3060000 { + compatible = "sophgo,cv1800-pwm"; + reg = <0x3060000 0x1000>; + clocks = <&clk 60>; + #pwm-cells = <3>; + };