| Message ID | 20240406112159.1634-2-jszhang@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: improve nommu and timer-clint | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7895c77545f1..b4af1df86352 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -247,10 +247,16 @@ config MMU Select if you want MMU-based virtualised addressing space support by paged memory management. If unsure, say 'Y'. +if !MMU +config DRAM_BASE + hex '(S)DRAM Base Address' + default 0x80000000 +endif + config PAGE_OFFSET hex default 0xC0000000 if 32BIT && MMU - default 0x80000000 if !MMU + default DRAM_BASE if !MMU default 0xff60000000000000 if 64BIT config KASAN_SHADOW_OFFSET
Currently, PAGE_OFFSET is hardcoded as 0x8000_0000, it works fine since there's only one nommu platform in the mainline. However, there are many cases where the (S)DRAM base address isn't 0x8000_0000, so remove the hardcoding value, and introduce DRAM_BASE which will be set by users during configuring. DRAM_BASE is 0x8000_0000 by default. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/Kconfig | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)