From patchwork Tue Apr 16 18:44:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 13632347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F0DDCC4345F for ; Tue, 16 Apr 2024 18:46:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ahz3RlFUgaMmJZhLbszOX14zsLBfYYdiEpAe1vAznNY=; b=ONUFbpKq/VqmkV xNq/8URJjr59SkuUeFiOmvP1f5t8XC+dHKVuS0827EXEI8l0KU4RLItMdSwK7LLA3tQ8dwv3P7Ami Mve13hp7z30YLtxIUO4Ind/uhwRssVMLjv72ZDxo53KnK5pEk9uv/qwGN+oLTMWIijZvA1NqDZqy/ UvO+CrS6hFCCCk5yuZS4vohwHU6WH/Ta1vgsH8Cb2+kXnm8kBYzZVJwN73ybCJ3jQekQQDYJ+ZKCz 3wVuXk/Dt5eb82VZUwQfPkQ/ajWnqhAusQeQWqt2ekYIZX/V1bNuG/LqpqvrjG0OB32E3KrSO835H vlroPfyXnM79jOdBZErA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwnoi-0000000DNDL-0VeX; Tue, 16 Apr 2024 18:46:04 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwnnp-0000000DMUv-44A0 for linux-riscv@bombadil.infradead.org; Tue, 16 Apr 2024 18:45:10 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=K/zHwGjJUr6D05KIztpGDsyJZSWroCpzob1LwbCt9c8=; b=NYHLeymHXq2+ZNrLFTjvC74UxK jimal8TlVj9lWylQVBOx6BlazHYhb04rOp4i0SBsk7Fs5XN5p+snHr4Id0M6isNfo5Tf+Tdqq2Uma Yar8hGGg4eBsGl6bG4qfsGN1g6+wiDtdNfs+wrwzBr+BhMTnAL8tWSDEBTw8SniepyJxocuDkqTrU qx01Ba2DrswIJ04Qwvh619vALzNRjOOrKrpasEdR3e/6rwt1G4MOLYOQsW8nBJyDY9C1c2NapThJ6 8oPS84j6GCzAk+UP1jDQaa4kxPbi99ybWRvpkQ/xJwMPKMgtN3GbvFPreyujN3vRH6iUu68bhP1wz hKFSqp9Q==; Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rwnnl-0000000BCIT-3CrL for linux-riscv@lists.infradead.org; Tue, 16 Apr 2024 18:45:08 +0000 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-5d81b08d6f2so3596461a12.0 for ; Tue, 16 Apr 2024 11:45:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1713293103; x=1713897903; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K/zHwGjJUr6D05KIztpGDsyJZSWroCpzob1LwbCt9c8=; b=vSlDFHiyRaq2mmnW9hrJetpK5RSCtkJ2BNDe1TEHY+4ND1QdR0tsjZRH9tIOUAjT2W YZz0tHob5G/aYNuhzKvj5EZcAOxzJX0Lj/31wMtdT5+hbkJgMB8DV5Mfg9O3iSUZBL8c GndWY1xogfXQgSHtJ/S9UCljUgb7P1vEMWnZfW7cGz7yICbR9mtqslqXQkxvJncaLtuh ++Ennd+nzmDj7Iij0w8PRjGlN9VLrxI+SkqYCrJgt0O0UPUW1CJV2VbiG0ZdqvzGpHib lmkMom9oBW3eM37W/wUlN6oW5ySp6iGlT62CBveLqTfdwfC7GZMhet3R2SuRzgZVLXB2 wHLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713293103; x=1713897903; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K/zHwGjJUr6D05KIztpGDsyJZSWroCpzob1LwbCt9c8=; b=lwWC3VQyMU5LbQ6csb+JUPskJZXW/1hNJmyc1k8pfVEcyCv2D7hSXsjkKcvYgR7+Vp yuw0NhcB0MywpXEFI9b0VmsPVXHhugPzBniTURVw23UhtUd8U6BT81ihYyrygzsJqc9q 8II1rd740OBkU/tnEKRk+JWn1uVNGrJxXPYR4bDbgmzVkMbDigroyp5e7Jmj/GhJEFly 5f2hg/p9KtJBAYgUwDeqXQ4tM5gUxKMWfIi4A2t0k07d/Pa2/fkCszeFYpx+Syxz06CQ rwU3+5XY+uBSqXZxrO8IInKaDNcIjXcVdNL9MrkZcmiGvYz8uCmkqC9eFgWz+HcqLTtv 0qug== X-Forwarded-Encrypted: i=1; AJvYcCVHkLWN8LSdGaQJjH5u2+fxxiLneQoKUtPCTIn8fU3HPfOYNtmmcnliaFUn8xDJr3HTfoEnQZAtK9Mi+3d7QapfuIIyhGGCseHDazzoreFm X-Gm-Message-State: AOJu0Yz2HXO2diVQUVJ5IxJWxrKIJKRbUlZzXP4qBdBv569mixlpZz3b DAX2olSm5MBzb1OABpVduL9uAHHXqwnxwUaCi+9pPjGCTRKvBx0eaYLvXj/+bHc= X-Google-Smtp-Source: AGHT+IGkSLP+G9OfSvAm6OeBIjVKORUjBByK8gTejadMruSiporaGb7bfMqDPAMUlAQl6HsFlPwaYQ== X-Received: by 2002:a17:90a:fd8f:b0:2a2:bbb9:c937 with SMTP id cx15-20020a17090afd8f00b002a2bbb9c937mr12054639pjb.49.1713293102765; Tue, 16 Apr 2024 11:45:02 -0700 (PDT) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id o19-20020a17090aac1300b002a269828bb8sm8883645pjq.40.2024.04.16.11.45.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Apr 2024 11:45:02 -0700 (PDT) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Andrew Jones , Anup Patel , Ajay Kaher , Albert Ou , Alexandre Ghiti , Conor Dooley , Juergen Gross , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Shuah Khan , virtualization@lists.linux.dev, Will Deacon , x86@kernel.org Subject: [PATCH v7 15/24] RISC-V: KVM: Support 64 bit firmware counters on RV32 Date: Tue, 16 Apr 2024 11:44:12 -0700 Message-Id: <20240416184421.3693802-16-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240416184421.3693802-1-atishp@rivosinc.com> References: <20240416184421.3693802-1-atishp@rivosinc.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240416_194505_863428_7F498E9E X-CRM114-Status: GOOD ( 16.81 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The SBI v2.0 introduced a fw_read_hi function to read 64 bit firmware counters for RV32 based systems. Add infrastructure to support that. Reviewed-by: Andrew Jones Reviewed-by: Anup Patel Signed-off-by: Atish Patra --- arch/riscv/include/asm/kvm_vcpu_pmu.h | 4 ++- arch/riscv/kvm/vcpu_pmu.c | 44 ++++++++++++++++++++++++++- arch/riscv/kvm/vcpu_sbi_pmu.c | 6 ++++ 3 files changed, 52 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_pmu.h b/arch/riscv/include/asm/kvm_vcpu_pmu.h index 257f17641e00..55861b5d3382 100644 --- a/arch/riscv/include/asm/kvm_vcpu_pmu.h +++ b/arch/riscv/include/asm/kvm_vcpu_pmu.h @@ -20,7 +20,7 @@ static_assert(RISCV_KVM_MAX_COUNTERS <= 64); struct kvm_fw_event { /* Current value of the event */ - unsigned long value; + u64 value; /* Event monitoring status */ bool started; @@ -91,6 +91,8 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba struct kvm_vcpu_sbi_return *retdata); int kvm_riscv_vcpu_pmu_ctr_read(struct kvm_vcpu *vcpu, unsigned long cidx, struct kvm_vcpu_sbi_return *retdata); +int kvm_riscv_vcpu_pmu_fw_ctr_read_hi(struct kvm_vcpu *vcpu, unsigned long cidx, + struct kvm_vcpu_sbi_return *retdata); void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu); int kvm_riscv_vcpu_pmu_snapshot_set_shmem(struct kvm_vcpu *vcpu, unsigned long saddr_low, unsigned long saddr_high, unsigned long flags, diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c index a801ed52dc9b..e1409ec9afc0 100644 --- a/arch/riscv/kvm/vcpu_pmu.c +++ b/arch/riscv/kvm/vcpu_pmu.c @@ -197,6 +197,36 @@ static int pmu_get_pmc_index(struct kvm_pmu *pmu, unsigned long eidx, return kvm_pmu_get_programmable_pmc_index(pmu, eidx, cbase, cmask); } +static int pmu_fw_ctr_read_hi(struct kvm_vcpu *vcpu, unsigned long cidx, + unsigned long *out_val) +{ + struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu); + struct kvm_pmc *pmc; + int fevent_code; + + if (!IS_ENABLED(CONFIG_32BIT)) { + pr_warn("%s: should be invoked for only RV32\n", __func__); + return -EINVAL; + } + + if (cidx >= kvm_pmu_num_counters(kvpmu) || cidx == 1) { + pr_warn("Invalid counter id [%ld]during read\n", cidx); + return -EINVAL; + } + + pmc = &kvpmu->pmc[cidx]; + + if (pmc->cinfo.type != SBI_PMU_CTR_TYPE_FW) + return -EINVAL; + + fevent_code = get_event_code(pmc->event_idx); + pmc->counter_val = kvpmu->fw_event[fevent_code].value; + + *out_val = pmc->counter_val >> 32; + + return 0; +} + static int pmu_ctr_read(struct kvm_vcpu *vcpu, unsigned long cidx, unsigned long *out_val) { @@ -705,6 +735,18 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba return 0; } +int kvm_riscv_vcpu_pmu_fw_ctr_read_hi(struct kvm_vcpu *vcpu, unsigned long cidx, + struct kvm_vcpu_sbi_return *retdata) +{ + int ret; + + ret = pmu_fw_ctr_read_hi(vcpu, cidx, &retdata->out_val); + if (ret == -EINVAL) + retdata->err_val = SBI_ERR_INVALID_PARAM; + + return 0; +} + int kvm_riscv_vcpu_pmu_ctr_read(struct kvm_vcpu *vcpu, unsigned long cidx, struct kvm_vcpu_sbi_return *retdata) { @@ -778,7 +820,7 @@ void kvm_riscv_vcpu_pmu_init(struct kvm_vcpu *vcpu) pmc->cinfo.csr = CSR_CYCLE + i; } else { pmc->cinfo.type = SBI_PMU_CTR_TYPE_FW; - pmc->cinfo.width = BITS_PER_LONG - 1; + pmc->cinfo.width = 63; } } diff --git a/arch/riscv/kvm/vcpu_sbi_pmu.c b/arch/riscv/kvm/vcpu_sbi_pmu.c index d3e7625fb2d2..cf111de51bdb 100644 --- a/arch/riscv/kvm/vcpu_sbi_pmu.c +++ b/arch/riscv/kvm/vcpu_sbi_pmu.c @@ -64,6 +64,12 @@ static int kvm_sbi_ext_pmu_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, case SBI_EXT_PMU_COUNTER_FW_READ: ret = kvm_riscv_vcpu_pmu_ctr_read(vcpu, cp->a0, retdata); break; + case SBI_EXT_PMU_COUNTER_FW_READ_HI: + if (IS_ENABLED(CONFIG_32BIT)) + ret = kvm_riscv_vcpu_pmu_fw_ctr_read_hi(vcpu, cp->a0, retdata); + else + retdata->out_val = 0; + break; case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM: ret = kvm_riscv_vcpu_pmu_snapshot_set_shmem(vcpu, cp->a0, cp->a1, cp->a2, retdata); break;