From patchwork Wed Apr 24 16:25:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13642168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BBD33C4345F for ; Wed, 24 Apr 2024 16:26:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=H2iD0cgRo7k+2/Hx5c/iQbKjJdHihmmLVPoqucDi1kg=; b=wMQOgHwGfDUHvl xf8Bfp2I5+p3+TE7l+55jIgEbn0W0MNQJFw/1HDVKOHI637lLI2Qx6xklQCmESSf3+yob/kOGKMXp q9ZUA5vV8nQXCnU9Rh8F2N2vft6Te0HNNSQFoAoYFRQdc1b41MAUy4sj9R3PdkEwXi9r1ZZYboyV3 poYxJQKemk3++pgcIKeBER/1q/Ms75hZQSRyISUHbcsV5mVus+CWuDtyK2qMVhrUeEvRDavFCJcnC gBFJStlflBkMBygDyh07HMP5T4dHI6xROFiN0ogM3OTgABQ0bSB0HR0X2ik8QY7nx1FErBxA+Fd91 zQNTF9xQbxb46JxkdqAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzfRV-00000004wbU-26MY; Wed, 24 Apr 2024 16:25:57 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rzfRS-00000004waR-0x49 for linux-riscv@lists.infradead.org; Wed, 24 Apr 2024 16:25:56 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 09512CE176A; Wed, 24 Apr 2024 16:25:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 239A4C113CD; Wed, 24 Apr 2024 16:25:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1713975951; bh=oI1b8kqDH/8miPXxoT7fdpUo4BcnLxtpPFTxdZ4YrOM=; h=From:To:Cc:Subject:Date:From; b=ezZeMQYbPamei6p0XNikEjt50jhShYagX1GVtuubDlMFeYQwlB8zFqAEZa3qpJu3v kjPQME8f5DLNfQ0uB7k57JVOFWz0e7F+LNdQzDxRawU0q3SDVIDaVQoesLp8tOYcxn gqYFZd90JkltX0EcCEylSx5QI0vPTKplUKu6Se//BCR2maGmUswL18BeK3eqiozoku GDgnJD0QkYgPhtVb0jTuMVXD9jO5CV3Z/xaZ5+7NtUJZZbpyhU484rjTXFwGiwzpD9 dolxUatwisI6b6aBcpq2MzPWBVoclg2q1vuRCcXt2ok4RDHun8h8arE2848sWFCyf+ B5+eF617qSxFw== From: Conor Dooley To: linux-riscv@lists.infradead.org Cc: conor@kernel.org, Conor Dooley , Samuel Holland , Pu Lehui , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Andrew Jones , Paul Walmsley , Palmer Dabbelt , linux-kernel@vger.kernel.org Subject: [PATCH v2] RISC-V: clarify what some RISCV_ISA* config options do Date: Wed, 24 Apr 2024 17:25:21 +0100 Message-ID: <20240424-tabby-plural-5f1d9fe44f47@spud> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5473; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=wk4E/pxggdkeSnKuNpxKb8WehqS3wGMKwrH1RMIGJ5A=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDGmaRoVKV07vSDl9qMx0y/qCUsGlWffFpxcIPGBUmTI1t eOTzL5vHaUsDGIcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZhIWhEjw18vsd9HjqeUfNoi pPTEP3FBclv3K8H0xH3s894e/RhjtYThf5l9JLsdm/cb/dYuD3/DmRtlfT8lTr/K866fvfxA1vl +XgA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240424_092554_654881_A871194C X-CRM114-Status: GOOD ( 20.84 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Conor Dooley During some discussion on IRC yesterday and on Pu's bpf patch [1] I noticed that these RISCV_ISA* Kconfig options are not really clear about their implications. Many of these options have no impact on what userspace is allowed to do, for example an application can use Zbb regardless of whether or not the kernel does. Change the help text to try and clarify whether or not an option affects just the kernel, or also userspace. None of these options actually control whether or not an extension is detected dynamically as that's done regardless of Kconfig options, so drop any text that implies the option is required for dynamic detection, rewording them as "do x when y is detected". Link: https://lore.kernel.org/linux-riscv/20240328-ferocity-repose-c554f75a676c@spud/ [1] Signed-off-by: Conor Dooley Reviewed-by: Andrew Jones --- Since this is a commit entirely about wording, I dropped both R-bs for v2 as, while my intent hasn't changed, I've come up with a new set of wordings. v2 redoes some of the "detected by the kernel" wording to avoid stuff that Drew pointed out was redundant & adds a wee bit more wording to the C extension's stuff to be clear that it is a build time option. CC: Samuel Holland CC: Pu Lehui CC: Björn Töpel CC: Andrew Jones CC: Paul Walmsley CC: Palmer Dabbelt CC: linux-riscv@lists.infradead.org CC: linux-kernel@vger.kernel.org --- arch/riscv/Kconfig | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 6d64888134ba..8376595501ba 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -493,7 +493,8 @@ config RISCV_ISA_C help Adds "C" to the ISA subsets that the toolchain is allowed to emit when building Linux, which results in compressed instructions in the - Linux binary. + Linux binary. This option produces a kernel that will not run on + systems that do not support compressed instructions. If you don't know what to do here, say Y. @@ -503,8 +504,8 @@ config RISCV_ISA_SVNAPOT depends on RISCV_ALTERNATIVE default y help - Allow kernel to detect the Svnapot ISA-extension dynamically at boot - time and enable its usage. + Add support for the Svnapot ISA-extension in the kernel when it + is detected at boot. The Svnapot extension is used to mark contiguous PTEs as a range of contiguous virtual-to-physical translations for a naturally @@ -522,9 +523,8 @@ config RISCV_ISA_SVPBMT depends on RISCV_ALTERNATIVE default y help - Adds support to dynamically detect the presence of the Svpbmt - ISA-extension (Supervisor-mode: page-based memory types) and - enable its usage. + Add support for the Svpbmt ISA-extension (Supervisor-mode: + page-based memory types) in the kernel when it is detected at boot. The memory type for a page contains a combination of attributes that indicate the cacheability, idempotency, and ordering @@ -543,14 +543,15 @@ config TOOLCHAIN_HAS_V depends on AS_HAS_OPTION_ARCH config RISCV_ISA_V - bool "VECTOR extension support" + bool "Vector extension support" depends on TOOLCHAIN_HAS_V depends on FPU select DYNAMIC_SIGFRAME default y help - Say N here if you want to disable all vector related procedure - in the kernel. + Add support for the Vector extension when it is detected at boot. + When this option is disabled, neither the kernel nor userspace may + use vector procedures. If you don't know what to do here, say Y. @@ -608,8 +609,8 @@ config RISCV_ISA_ZBB depends on RISCV_ALTERNATIVE default y help - Adds support to dynamically detect the presence of the ZBB - extension (basic bit manipulation) and enable its usage. + Add support for enabling optimisations in the kernel when the + Zbb extension is detected at boot. The Zbb extension provides instructions to accelerate a number of bit-specific operations (count bit population, sign extending, @@ -625,9 +626,9 @@ config RISCV_ISA_ZICBOM select RISCV_DMA_NONCOHERENT select DMA_DIRECT_REMAP help - Adds support to dynamically detect the presence of the ZICBOM - extension (Cache Block Management Operations) and enable its - usage. + Add support for the Zicbom extension (Cache Block Management + Operations) and enable its use in the kernel when it is detected + at boot. The Zicbom extension can be used to handle for example non-coherent DMA support on devices that need it. @@ -640,7 +641,7 @@ config RISCV_ISA_ZICBOZ default y help Enable the use of the Zicboz extension (cbo.zero instruction) - when available. + in the kernel when it is detected at boot. The Zicboz extension is used for faster zeroing of memory. @@ -685,8 +686,9 @@ config FPU bool "FPU support" default y help - Say N here if you want to disable all floating-point related procedure - in the kernel. + Add support for floating point operations when an FPU is detected at + boot. When this option is disabled, neither the kernel nor userspace + may use the floating point unit. If you don't know what to do here, say Y.