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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org This set of PMU event descriptions applies not only to the SiFive U74 core configuration, but also to other SiFive cores that implement the Bullet microarchitecture (such as U64, P270, and X280). Rename the directory to be more generic. Signed-off-by: Samuel Holland --- tools/perf/pmu-events/arch/riscv/mapfile.csv | 2 +- .../pmu-events/arch/riscv/sifive/{u74 => bullet}/firmware.json | 0 .../sifive/{u74/instructions.json => bullet/instruction.json} | 0 .../pmu-events/arch/riscv/sifive/{u74 => bullet}/memory.json | 0 .../pmu-events/arch/riscv/sifive/{u74 => bullet}/microarch.json | 0 5 files changed, 1 insertion(+), 1 deletion(-) rename tools/perf/pmu-events/arch/riscv/sifive/{u74 => bullet}/firmware.json (100%) rename tools/perf/pmu-events/arch/riscv/sifive/{u74/instructions.json => bullet/instruction.json} (100%) rename tools/perf/pmu-events/arch/riscv/sifive/{u74 => bullet}/memory.json (100%) rename tools/perf/pmu-events/arch/riscv/sifive/{u74 => bullet}/microarch.json (100%) diff --git a/tools/perf/pmu-events/arch/riscv/mapfile.csv b/tools/perf/pmu-events/arch/riscv/mapfile.csv index 3d3a809a5446..521f416b0006 100644 --- a/tools/perf/pmu-events/arch/riscv/mapfile.csv +++ b/tools/perf/pmu-events/arch/riscv/mapfile.csv @@ -14,7 +14,7 @@ # # #MVENDORID-MARCHID-MIMPID,Version,Filename,EventType -0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/u74,core +0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/bullet,core 0x5b7-0x0-0x0,v1,thead/c900-legacy,core 0x67e-0x80000000db0000[89]0-0x[[:xdigit:]]+,v1,starfive/dubhe-80,core 0x31e-0x8000000000008a45-0x[[:xdigit:]]+,v1,andes/ax45,core diff --git a/tools/perf/pmu-events/arch/riscv/sifive/u74/firmware.json b/tools/perf/pmu-events/arch/riscv/sifive/bullet/firmware.json similarity index 100% rename from tools/perf/pmu-events/arch/riscv/sifive/u74/firmware.json rename to tools/perf/pmu-events/arch/riscv/sifive/bullet/firmware.json diff --git a/tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json b/tools/perf/pmu-events/arch/riscv/sifive/bullet/instruction.json similarity index 100% rename from tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json rename to tools/perf/pmu-events/arch/riscv/sifive/bullet/instruction.json diff --git a/tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json b/tools/perf/pmu-events/arch/riscv/sifive/bullet/memory.json similarity index 100% rename from tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json rename to tools/perf/pmu-events/arch/riscv/sifive/bullet/memory.json diff --git a/tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json b/tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json similarity index 100% rename from tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json rename to tools/perf/pmu-events/arch/riscv/sifive/bullet/microarch.json