diff mbox series

[RESEND,v5,3/3] RISC-V: Select ACPI PPTT drivers

Message ID 20240523111322.19243-3-cuiyunhui@bytedance.com (mailing list archive)
State Superseded
Headers show
Series [RESEND,v5,1/3] riscv: cacheinfo: remove the useless input parameter (node) of ci_leaf_init() | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-3-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
conchuod/patch-3-test-2 fail .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh
conchuod/patch-3-test-3 fail .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh
conchuod/patch-3-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-3-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-3-test-6 success .github/scripts/patches/tests/checkpatch.sh
conchuod/patch-3-test-7 success .github/scripts/patches/tests/dtb_warn_rv64.sh
conchuod/patch-3-test-8 success .github/scripts/patches/tests/header_inline.sh
conchuod/patch-3-test-9 success .github/scripts/patches/tests/kdoc.sh
conchuod/patch-3-test-10 success .github/scripts/patches/tests/module_param.sh
conchuod/patch-3-test-11 success .github/scripts/patches/tests/verify_fixes.sh
conchuod/patch-3-test-12 success .github/scripts/patches/tests/verify_signedoff.sh

Commit Message

Yunhui Cui May 23, 2024, 11:13 a.m. UTC 
After adding ACPI support to populate_cache_leaves(), RISC-V can build
cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT
configuration.

Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
---
 arch/riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)

Comments

Yunhui Cui May 27, 2024, 12:51 p.m. UTC | #1 
Hi Palmer,

Gentle ping ...

On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
>
> After adding ACPI support to populate_cache_leaves(), RISC-V can build
> cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT
> configuration.
>
> Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
> Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>  arch/riscv/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index f961449ca077..a9ebecd72052 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -14,6 +14,7 @@ config RISCV
>         def_bool y
>         select ACPI_GENERIC_GSI if ACPI
>         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> +       select ACPI_PPTT if ACPI
>         select ARCH_DMA_DEFAULT_COHERENT
>         select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
>         select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> --
> 2.20.1
>

Thanks,
Yunhui
Yunhui Cui June 7, 2024, 8:44 a.m. UTC | #2 
Hi Sunilvl,


On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote:
>
> Hi Palmer,
>
> Gentle ping ...
>
> On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
> >
> > After adding ACPI support to populate_cache_leaves(), RISC-V can build
> > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT
> > configuration.
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
> > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> > ---
> >  arch/riscv/Kconfig | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index f961449ca077..a9ebecd72052 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -14,6 +14,7 @@ config RISCV
> >         def_bool y
> >         select ACPI_GENERIC_GSI if ACPI
> >         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> > +       select ACPI_PPTT if ACPI
> >         select ARCH_DMA_DEFAULT_COHERENT
> >         select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
> >         select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> > --
> > 2.20.1
> >
>
> Thanks,
> Yunhui

Could you please review or ack this patchset again? Palmer did not respond.

Link:
https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/

Thanks,
Yunhui
Sunil V L June 7, 2024, 11:01 a.m. UTC | #3 
Hi Yunhui,

On Fri, Jun 07, 2024 at 04:44:36PM +0800, yunhui cui wrote:
> Hi Sunilvl,
> 
> 
> On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote:
> >
> > Hi Palmer,
> >
> > Gentle ping ...
> >
> > On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
> > >
> > > After adding ACPI support to populate_cache_leaves(), RISC-V can build
> > > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT
> > > configuration.
> > >
> > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
> > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> > > ---
> > >  arch/riscv/Kconfig | 1 +
> > >  1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > index f961449ca077..a9ebecd72052 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -14,6 +14,7 @@ config RISCV
> > >         def_bool y
> > >         select ACPI_GENERIC_GSI if ACPI
> > >         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> > > +       select ACPI_PPTT if ACPI
NIT: I would add this prior to ACPI_REDUCED_HARDWARE_ONLY.

> > >         select ARCH_DMA_DEFAULT_COHERENT
> > >         select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
> > >         select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> > > --
> > > 2.20.1
> > >
> >
> > Thanks,
> > Yunhui
> 
> Could you please review or ack this patchset again? Palmer did not respond.
> 
> Link:
> https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/
> 
My bad, I was under the impression that I had Acked already. The series
looks good to me except the nit above.

Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>

Thanks,
Sunil
Yunhui Cui June 17, 2024, 12:59 p.m. UTC | #4 
Hi Sunil,

On Fri, Jun 7, 2024 at 7:01 PM Sunil V L <sunilvl@ventanamicro.com> wrote:
>
> Hi Yunhui,
>
> On Fri, Jun 07, 2024 at 04:44:36PM +0800, yunhui cui wrote:
> > Hi Sunilvl,
> >
> >
> > On Mon, May 27, 2024 at 8:51 PM yunhui cui <cuiyunhui@bytedance.com> wrote:
> > >
> > > Hi Palmer,
> > >
> > > Gentle ping ...
> > >
> > > On Thu, May 23, 2024 at 7:13 PM Yunhui Cui <cuiyunhui@bytedance.com> wrote:
> > > >
> > > > After adding ACPI support to populate_cache_leaves(), RISC-V can build
> > > > cacheinfo through the ACPI PPTT table, thus enabling the ACPI_PPTT
> > > > configuration.
> > > >
> > > > Signed-off-by: Yunhui Cui <cuiyunhui@bytedance.com>
> > > > Reviewed-by: Jeremy Linton <jeremy.linton@arm.com>
> > > > Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
> > > > ---
> > > >  arch/riscv/Kconfig | 1 +
> > > >  1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > > index f961449ca077..a9ebecd72052 100644
> > > > --- a/arch/riscv/Kconfig
> > > > +++ b/arch/riscv/Kconfig
> > > > @@ -14,6 +14,7 @@ config RISCV
> > > >         def_bool y
> > > >         select ACPI_GENERIC_GSI if ACPI
> > > >         select ACPI_REDUCED_HARDWARE_ONLY if ACPI
> > > > +       select ACPI_PPTT if ACPI
> NIT: I would add this prior to ACPI_REDUCED_HARDWARE_ONLY.

Okay, I will update it on v6.

>
> > > >         select ARCH_DMA_DEFAULT_COHERENT
> > > >         select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
> > > >         select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2
> > > > --
> > > > 2.20.1
> > > >
> > >
> > > Thanks,
> > > Yunhui
> >
> > Could you please review or ack this patchset again? Palmer did not respond.
> >
> > Link:
> > https://lore.kernel.org/linux-riscv/20240523111322.19243-3-cuiyunhui@bytedance.com/T/
> >
> My bad, I was under the impression that I had Acked already. The series
> looks good to me except the nit above.
>
> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
>
> Thanks,
> Sunil

Thanks,
Yunhui
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index f961449ca077..a9ebecd72052 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -14,6 +14,7 @@  config RISCV
 	def_bool y
 	select ACPI_GENERIC_GSI if ACPI
 	select ACPI_REDUCED_HARDWARE_ONLY if ACPI
+	select ACPI_PPTT if ACPI
 	select ARCH_DMA_DEFAULT_COHERENT
 	select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
 	select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2