| Message ID | 20240609-xtheadvector-v1-10-3fe591d7f109@rivosinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: Add support for xtheadvector | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Sun, Jun 9, 2024 at 9:45 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > Add a new hwprobe key "RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0" which > allows userspace to probe for the new RISCV_ISA_VENDOR_EXT_XTHEADVECTOR > vendor extension. > > This new key will allow userspace code to probe for which thead vendor > extensions are supported. This API is modeled to be consistent with > RISCV_HWPROBE_KEY_IMA_EXT_0. The bitmask returned will have each bit > corresponding to a supported thead vendor extension of the cpumask set. > Just like RISCV_HWPROBE_KEY_IMA_EXT_0, this allows a userspace program > to determine all of the supported thead vendor extensions in one call. > > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > Reviewed-by: Evan Green <evan@rivosinc.com> You can continue to keep my tag, but I came up with some nits to pick anyway. > --- > arch/riscv/include/asm/hwprobe.h | 4 +-- > .../include/asm/vendor_extensions/thead_hwprobe.h | 18 +++++++++++ > .../include/asm/vendor_extensions/vendor_hwprobe.h | 37 ++++++++++++++++++++++ > arch/riscv/include/uapi/asm/hwprobe.h | 3 +- > arch/riscv/include/uapi/asm/vendor/thead.h | 3 ++ > arch/riscv/kernel/sys_hwprobe.c | 5 +++ > arch/riscv/kernel/vendor_extensions/Makefile | 1 + > .../riscv/kernel/vendor_extensions/thead_hwprobe.c | 19 +++++++++++ > 8 files changed, 87 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h > index 630507dff5ea..e68496b4f8de 100644 > --- a/arch/riscv/include/asm/hwprobe.h > +++ b/arch/riscv/include/asm/hwprobe.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > /* > - * Copyright 2023 Rivos, Inc > + * Copyright 2023-2024 Rivos, Inc > */ > > #ifndef _ASM_HWPROBE_H > @@ -8,7 +8,7 @@ > > #include <uapi/asm/hwprobe.h> > > -#define RISCV_HWPROBE_MAX_KEY 6 > +#define RISCV_HWPROBE_MAX_KEY 7 > > static inline bool riscv_hwprobe_key_is_valid(__s64 key) > { > diff --git a/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h > new file mode 100644 > index 000000000000..925fef39a2c0 > --- /dev/null > +++ b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h > @@ -0,0 +1,18 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H > +#define _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H > + > +#include <linux/cpumask.h> > + > +#include <uapi/asm/hwprobe.h> > + > +#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD > +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus); > +#else > +static inline void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) > +{ > + pair->value = 0; > +} > +#endif > + > +#endif > diff --git a/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h > new file mode 100644 > index 000000000000..b6222e7b519e > --- /dev/null > +++ b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h > @@ -0,0 +1,37 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright 2024 Rivos, Inc > + */ > + > +#ifndef _ASM_RISCV_SYS_HWPROBE_H > +#define _ASM_RISCV_SYS_HWPROBE_H > + > +#include <asm/cpufeature.h> > + > +#define EXT_KEY(ext) \ Nit: Do you think it should be VENDOR_EXT_KEY? I had a slight ping of worry that the identifier sounds so generic it might conflict with something later, but meh maybe it's fine. > + do { \ > + if (__riscv_isa_extension_available(isainfo->isa, RISCV_ISA_VENDOR_EXT_##ext)) \ > + pair->value |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ > + else \ > + missing |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ > + } while (false) > + > +/* > + * Loop through and record extensions that 1) anyone has, and 2) anyone > + * doesn't have. > + * > + * _extension_checks is an arbitrary C block to set the values of pair->value > + * and missing. It should be filled with EXT_KEY expressions. > + */ > +#define VENDOR_EXTENSION_SUPPORTED(pair, cpus, per_hart_thead_bitmap, _extension_checks) \ Nit: This macro was meant to be generic for all vendors, but you've named one of the parameters per_hart_thead_bitmap. :) > + do { \ > + int cpu; \ > + u64 missing; \ > + for_each_cpu(cpu, (cpus)) { \ > + struct riscv_isavendorinfo *isainfo = &(per_hart_thead_bitmap)[cpu]; \ > + _extension_checks \ > + } \ > + (pair)->value &= ~missing; \ > + } while (false) \ > + > +#endif /* _ASM_RISCV_SYS_HWPROBE_H */ > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index dda76a05420b..155a83dd1cdf 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > /* > - * Copyright 2023 Rivos, Inc > + * Copyright 2023-2024 Rivos, Inc > */ > > #ifndef _UAPI_ASM_HWPROBE_H > @@ -68,6 +68,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) > #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) > #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 > +#define RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 7 > /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ > > /* Flags */ > diff --git a/arch/riscv/include/uapi/asm/vendor/thead.h b/arch/riscv/include/uapi/asm/vendor/thead.h > new file mode 100644 > index 000000000000..43790ebe5faf > --- /dev/null > +++ b/arch/riscv/include/uapi/asm/vendor/thead.h > @@ -0,0 +1,3 @@ > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > + > +#define RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR (1 << 0) > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > index 969ef3d59dbe..e39fa70083d3 100644 > --- a/arch/riscv/kernel/sys_hwprobe.c > +++ b/arch/riscv/kernel/sys_hwprobe.c > @@ -13,6 +13,7 @@ > #include <asm/uaccess.h> > #include <asm/unistd.h> > #include <asm/vector.h> > +#include <asm/vendor_extensions/thead_hwprobe.h> > #include <vdso/vsyscall.h> > > > @@ -217,6 +218,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > pair->value = riscv_cboz_block_size; > break; > > + case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0: > + hwprobe_isa_vendor_ext_thead_0(pair, cpus); > + break; > + > /* > * For forward compatibility, unknown keys don't fail the whole > * call, but get their element key set to -1 and value set to 0 > diff --git a/arch/riscv/kernel/vendor_extensions/Makefile b/arch/riscv/kernel/vendor_extensions/Makefile > index 353522cb3bf0..866414c81a9f 100644 > --- a/arch/riscv/kernel/vendor_extensions/Makefile > +++ b/arch/riscv/kernel/vendor_extensions/Makefile > @@ -2,3 +2,4 @@ > > obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES) += andes.o > obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead.o > +obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead_hwprobe.o > diff --git a/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c > new file mode 100644 > index 000000000000..53f65942f7e8 > --- /dev/null > +++ b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c > @@ -0,0 +1,19 @@ > +// SPDX-License-Identifier: GPL-2.0-only > + > +#include <asm/vendor_extensions/thead.h> > +#include <asm/vendor_extensions/thead_hwprobe.h> > +#include <asm/vendor_extensions/vendor_hwprobe.h> > + > +#include <linux/cpumask.h> > +#include <linux/types.h> > + > +#include <uapi/asm/hwprobe.h> > +#include <uapi/asm/vendor/thead.h> > + > +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) > +{ > + VENDOR_EXTENSION_SUPPORTED(pair, cpus, > + riscv_isa_vendor_ext_list_thead.per_hart_isa_bitmap, { > + EXT_KEY(XTHEADVECTOR); > + }); > +} > > -- > 2.44.0 >
On Mon, Jun 10, 2024 at 09:50:16AM -0700, Evan Green wrote: > On Sun, Jun 9, 2024 at 9:45 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > > > Add a new hwprobe key "RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0" which > > allows userspace to probe for the new RISCV_ISA_VENDOR_EXT_XTHEADVECTOR > > vendor extension. > > > > This new key will allow userspace code to probe for which thead vendor > > extensions are supported. This API is modeled to be consistent with > > RISCV_HWPROBE_KEY_IMA_EXT_0. The bitmask returned will have each bit > > corresponding to a supported thead vendor extension of the cpumask set. > > Just like RISCV_HWPROBE_KEY_IMA_EXT_0, this allows a userspace program > > to determine all of the supported thead vendor extensions in one call. > > > > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > > Reviewed-by: Evan Green <evan@rivosinc.com> > > You can continue to keep my tag, but I came up with some nits to pick anyway. > > > --- > > arch/riscv/include/asm/hwprobe.h | 4 +-- > > .../include/asm/vendor_extensions/thead_hwprobe.h | 18 +++++++++++ > > .../include/asm/vendor_extensions/vendor_hwprobe.h | 37 ++++++++++++++++++++++ > > arch/riscv/include/uapi/asm/hwprobe.h | 3 +- > > arch/riscv/include/uapi/asm/vendor/thead.h | 3 ++ > > arch/riscv/kernel/sys_hwprobe.c | 5 +++ > > arch/riscv/kernel/vendor_extensions/Makefile | 1 + > > .../riscv/kernel/vendor_extensions/thead_hwprobe.c | 19 +++++++++++ > > 8 files changed, 87 insertions(+), 3 deletions(-) > > > > diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h > > index 630507dff5ea..e68496b4f8de 100644 > > --- a/arch/riscv/include/asm/hwprobe.h > > +++ b/arch/riscv/include/asm/hwprobe.h > > @@ -1,6 +1,6 @@ > > /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > > /* > > - * Copyright 2023 Rivos, Inc > > + * Copyright 2023-2024 Rivos, Inc > > */ > > > > #ifndef _ASM_HWPROBE_H > > @@ -8,7 +8,7 @@ > > > > #include <uapi/asm/hwprobe.h> > > > > -#define RISCV_HWPROBE_MAX_KEY 6 > > +#define RISCV_HWPROBE_MAX_KEY 7 > > > > static inline bool riscv_hwprobe_key_is_valid(__s64 key) > > { > > diff --git a/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h > > new file mode 100644 > > index 000000000000..925fef39a2c0 > > --- /dev/null > > +++ b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h > > @@ -0,0 +1,18 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H > > +#define _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H > > + > > +#include <linux/cpumask.h> > > + > > +#include <uapi/asm/hwprobe.h> > > + > > +#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD > > +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus); > > +#else > > +static inline void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) > > +{ > > + pair->value = 0; > > +} > > +#endif > > + > > +#endif > > diff --git a/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h > > new file mode 100644 > > index 000000000000..b6222e7b519e > > --- /dev/null > > +++ b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h > > @@ -0,0 +1,37 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright 2024 Rivos, Inc > > + */ > > + > > +#ifndef _ASM_RISCV_SYS_HWPROBE_H > > +#define _ASM_RISCV_SYS_HWPROBE_H > > + > > +#include <asm/cpufeature.h> > > + > > +#define EXT_KEY(ext) \ > > Nit: Do you think it should be VENDOR_EXT_KEY? I had a slight ping of > worry that the identifier sounds so generic it might conflict with > something later, but meh maybe it's fine. That's a good point, I will change. > > > > + do { \ > > + if (__riscv_isa_extension_available(isainfo->isa, RISCV_ISA_VENDOR_EXT_##ext)) \ > > + pair->value |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ > > + else \ > > + missing |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ > > + } while (false) > > + > > +/* > > + * Loop through and record extensions that 1) anyone has, and 2) anyone > > + * doesn't have. > > + * > > + * _extension_checks is an arbitrary C block to set the values of pair->value > > + * and missing. It should be filled with EXT_KEY expressions. > > + */ > > +#define VENDOR_EXTENSION_SUPPORTED(pair, cpus, per_hart_thead_bitmap, _extension_checks) \ > > Nit: This macro was meant to be generic for all vendors, but you've > named one of the parameters per_hart_thead_bitmap. :) Whoops, thank you! - Charlie > > > + do { \ > > + int cpu; \ > > + u64 missing; \ > > + for_each_cpu(cpu, (cpus)) { \ > > + struct riscv_isavendorinfo *isainfo = &(per_hart_thead_bitmap)[cpu]; \ > > + _extension_checks \ > > + } \ > > + (pair)->value &= ~missing; \ > > + } while (false) \ > > + > > +#endif /* _ASM_RISCV_SYS_HWPROBE_H */ > > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > > index dda76a05420b..155a83dd1cdf 100644 > > --- a/arch/riscv/include/uapi/asm/hwprobe.h > > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > > @@ -1,6 +1,6 @@ > > /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > > /* > > - * Copyright 2023 Rivos, Inc > > + * Copyright 2023-2024 Rivos, Inc > > */ > > > > #ifndef _UAPI_ASM_HWPROBE_H > > @@ -68,6 +68,7 @@ struct riscv_hwprobe { > > #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) > > #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) > > #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 > > +#define RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 7 > > /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ > > > > /* Flags */ > > diff --git a/arch/riscv/include/uapi/asm/vendor/thead.h b/arch/riscv/include/uapi/asm/vendor/thead.h > > new file mode 100644 > > index 000000000000..43790ebe5faf > > --- /dev/null > > +++ b/arch/riscv/include/uapi/asm/vendor/thead.h > > @@ -0,0 +1,3 @@ > > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > > + > > +#define RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR (1 << 0) > > diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c > > index 969ef3d59dbe..e39fa70083d3 100644 > > --- a/arch/riscv/kernel/sys_hwprobe.c > > +++ b/arch/riscv/kernel/sys_hwprobe.c > > @@ -13,6 +13,7 @@ > > #include <asm/uaccess.h> > > #include <asm/unistd.h> > > #include <asm/vector.h> > > +#include <asm/vendor_extensions/thead_hwprobe.h> > > #include <vdso/vsyscall.h> > > > > > > @@ -217,6 +218,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, > > pair->value = riscv_cboz_block_size; > > break; > > > > + case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0: > > + hwprobe_isa_vendor_ext_thead_0(pair, cpus); > > + break; > > + > > /* > > * For forward compatibility, unknown keys don't fail the whole > > * call, but get their element key set to -1 and value set to 0 > > diff --git a/arch/riscv/kernel/vendor_extensions/Makefile b/arch/riscv/kernel/vendor_extensions/Makefile > > index 353522cb3bf0..866414c81a9f 100644 > > --- a/arch/riscv/kernel/vendor_extensions/Makefile > > +++ b/arch/riscv/kernel/vendor_extensions/Makefile > > @@ -2,3 +2,4 @@ > > > > obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES) += andes.o > > obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead.o > > +obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead_hwprobe.o > > diff --git a/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c > > new file mode 100644 > > index 000000000000..53f65942f7e8 > > --- /dev/null > > +++ b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c > > @@ -0,0 +1,19 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > + > > +#include <asm/vendor_extensions/thead.h> > > +#include <asm/vendor_extensions/thead_hwprobe.h> > > +#include <asm/vendor_extensions/vendor_hwprobe.h> > > + > > +#include <linux/cpumask.h> > > +#include <linux/types.h> > > + > > +#include <uapi/asm/hwprobe.h> > > +#include <uapi/asm/vendor/thead.h> > > + > > +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) > > +{ > > + VENDOR_EXTENSION_SUPPORTED(pair, cpus, > > + riscv_isa_vendor_ext_list_thead.per_hart_isa_bitmap, { > > + EXT_KEY(XTHEADVECTOR); > > + }); > > +} > > > > -- > > 2.44.0 > >
diff --git a/arch/riscv/include/asm/hwprobe.h b/arch/riscv/include/asm/hwprobe.h index 630507dff5ea..e68496b4f8de 100644 --- a/arch/riscv/include/asm/hwprobe.h +++ b/arch/riscv/include/asm/hwprobe.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* - * Copyright 2023 Rivos, Inc + * Copyright 2023-2024 Rivos, Inc */ #ifndef _ASM_HWPROBE_H @@ -8,7 +8,7 @@ #include <uapi/asm/hwprobe.h> -#define RISCV_HWPROBE_MAX_KEY 6 +#define RISCV_HWPROBE_MAX_KEY 7 static inline bool riscv_hwprobe_key_is_valid(__s64 key) { diff --git a/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h new file mode 100644 index 000000000000..925fef39a2c0 --- /dev/null +++ b/arch/riscv/include/asm/vendor_extensions/thead_hwprobe.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H +#define _ASM_RISCV_VENDOR_EXTENSIONS_THEAD_HWPROBE_H + +#include <linux/cpumask.h> + +#include <uapi/asm/hwprobe.h> + +#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_THEAD +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus); +#else +static inline void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) +{ + pair->value = 0; +} +#endif + +#endif diff --git a/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h new file mode 100644 index 000000000000..b6222e7b519e --- /dev/null +++ b/arch/riscv/include/asm/vendor_extensions/vendor_hwprobe.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2024 Rivos, Inc + */ + +#ifndef _ASM_RISCV_SYS_HWPROBE_H +#define _ASM_RISCV_SYS_HWPROBE_H + +#include <asm/cpufeature.h> + +#define EXT_KEY(ext) \ + do { \ + if (__riscv_isa_extension_available(isainfo->isa, RISCV_ISA_VENDOR_EXT_##ext)) \ + pair->value |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ + else \ + missing |= RISCV_HWPROBE_VENDOR_EXT_##ext; \ + } while (false) + +/* + * Loop through and record extensions that 1) anyone has, and 2) anyone + * doesn't have. + * + * _extension_checks is an arbitrary C block to set the values of pair->value + * and missing. It should be filled with EXT_KEY expressions. + */ +#define VENDOR_EXTENSION_SUPPORTED(pair, cpus, per_hart_thead_bitmap, _extension_checks) \ + do { \ + int cpu; \ + u64 missing; \ + for_each_cpu(cpu, (cpus)) { \ + struct riscv_isavendorinfo *isainfo = &(per_hart_thead_bitmap)[cpu]; \ + _extension_checks \ + } \ + (pair)->value &= ~missing; \ + } while (false) \ + +#endif /* _ASM_RISCV_SYS_HWPROBE_H */ diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h index dda76a05420b..155a83dd1cdf 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* - * Copyright 2023 Rivos, Inc + * Copyright 2023-2024 Rivos, Inc */ #ifndef _UAPI_ASM_HWPROBE_H @@ -68,6 +68,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_MISALIGNED_UNSUPPORTED (4 << 0) #define RISCV_HWPROBE_MISALIGNED_MASK (7 << 0) #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6 +#define RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0 7 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ /* Flags */ diff --git a/arch/riscv/include/uapi/asm/vendor/thead.h b/arch/riscv/include/uapi/asm/vendor/thead.h new file mode 100644 index 000000000000..43790ebe5faf --- /dev/null +++ b/arch/riscv/include/uapi/asm/vendor/thead.h @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ + +#define RISCV_HWPROBE_VENDOR_EXT_XTHEADVECTOR (1 << 0) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c index 969ef3d59dbe..e39fa70083d3 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -13,6 +13,7 @@ #include <asm/uaccess.h> #include <asm/unistd.h> #include <asm/vector.h> +#include <asm/vendor_extensions/thead_hwprobe.h> #include <vdso/vsyscall.h> @@ -217,6 +218,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, pair->value = riscv_cboz_block_size; break; + case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0: + hwprobe_isa_vendor_ext_thead_0(pair, cpus); + break; + /* * For forward compatibility, unknown keys don't fail the whole * call, but get their element key set to -1 and value set to 0 diff --git a/arch/riscv/kernel/vendor_extensions/Makefile b/arch/riscv/kernel/vendor_extensions/Makefile index 353522cb3bf0..866414c81a9f 100644 --- a/arch/riscv/kernel/vendor_extensions/Makefile +++ b/arch/riscv/kernel/vendor_extensions/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES) += andes.o obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead.o +obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD) += thead_hwprobe.o diff --git a/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c new file mode 100644 index 000000000000..53f65942f7e8 --- /dev/null +++ b/arch/riscv/kernel/vendor_extensions/thead_hwprobe.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <asm/vendor_extensions/thead.h> +#include <asm/vendor_extensions/thead_hwprobe.h> +#include <asm/vendor_extensions/vendor_hwprobe.h> + +#include <linux/cpumask.h> +#include <linux/types.h> + +#include <uapi/asm/hwprobe.h> +#include <uapi/asm/vendor/thead.h> + +void hwprobe_isa_vendor_ext_thead_0(struct riscv_hwprobe *pair, const struct cpumask *cpus) +{ + VENDOR_EXTENSION_SUPPORTED(pair, cpus, + riscv_isa_vendor_ext_list_thead.per_hart_isa_bitmap, { + EXT_KEY(XTHEADVECTOR); + }); +}