| Message ID | 20240708120830.5785-2-ziyao@disroot.org (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add USB support for Sophgo CV1800/SG200x SoCs | expand |
On 08/07/2024 14:08, Yao Zi wrote: > cv1800-usb-phy driver supports USB 2.0 phys integrated in Sophgo > Cv1800/SG200x SoCs. Add YAML schema for its binding. > > Signed-off-by: Yao Zi <ziyao@disroot.org> A nit, subject: drop second/last, redundant "bindings". The "dt-bindings" prefix is already stating that these are bindings. See also: https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18 > +properties: > + compatible: > + enum: > + - sophgo,cv1800-usb-phy > + > + reg: > + maxItems: 2 > + > + reg-names: > + items: > + - const: phy > + - const: pin > + > + clocks: > + maxItems: 4 > + > + clock-names: > + items: > + - const: apb > + - const: 125m > + - const: 33k > + - const: 12m All these three should have rather some logical name, not frequency. > + > + "#phy-cells": > + const: 0 > + > + dr_role: No underscores in node names, missing vendor prefix (unless it is generic property), missing description. Please do not invent new properties like this. You probably wanted to reference usb-drd? Best regards, Krzysztof
On Mon, Jul 08, 2024 at 12:08:28PM GMT, Yao Zi wrote: > cv1800-usb-phy driver supports USB 2.0 phys integrated in Sophgo > Cv1800/SG200x SoCs. Add YAML schema for its binding. > > Signed-off-by: Yao Zi <ziyao@disroot.org> > --- > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > new file mode 100644 > index 000000000000..0403d899e23b > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > @@ -0,0 +1,67 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2019 BayLibre, SAS > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo CV1800 USB PHY > + > +maintainers: > + - Yao Zi <ziyao@disroot.org> > + > +properties: > + compatible: > + enum: > + - sophgo,cv1800-usb-phy > + > + reg: > + maxItems: 2 > + > + reg-names: > + items: > + - const: phy > + - const: pin drop pin, cv1800 series does not support this. > + > + clocks: > + maxItems: 4 > + > + clock-names: > + items: > + - const: apb > + - const: 125m > + - const: 33k > + - const: 12m > + > + "#phy-cells": > + const: 0 > + > + dr_role: > + enum: > + - host > + - device cv181x series have otg support. For board with OTG, it should be properly handled. > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - "#phy-cells" > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/sophgo,cv1800.h> > + usb_phy: usb-phy@3006000 { > + compatible = "sophgo,cv1800-usb-phy"; > + reg = <0x300600 0x60>, <0x3000048 0x4>; > + reg-names = "phy", "pin"; > + clocks = <&clk CLK_APB_USB>, > + <&clk CLK_USB_125M>, > + <&clk CLK_USB_33K>, > + <&clk CLK_USB_12M>; > + clock-names = "apb", "125m", "33k", "12m"; > + #phy-cells = <0>; > + }; > -- > 2.45.2 > You patch is duplicated, I have sumbitted patches month ago and still needs some time to figure out the best topology. Phy driver belongs to syscon, which make things kind of complex. https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/#t Regards, Inochi
On 2024/7/9 6:23, Inochi Amaoto wrote: [......] > You patch is duplicated, I have sumbitted patches > month ago and still needs some time to figure out > the best topology. Phy driver belongs to syscon, > which make things kind of complex. > > https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/#t > > Regards, > Inochi hi, Yao, Thanks for your contribution. Just FYI, we are archiving and tracking all PR status about sophgo products at https://github.com/sophgo/linux/wiki. Regards, Chen
On Tue, Jul 09, 2024 at 06:23:58AM +0800, Inochi Amaoto wrote: > On Mon, Jul 08, 2024 at 12:08:28PM GMT, Yao Zi wrote: > > cv1800-usb-phy driver supports USB 2.0 phys integrated in Sophgo > > Cv1800/SG200x SoCs. Add YAML schema for its binding. > > > > Signed-off-by: Yao Zi <ziyao@disroot.org> > > --- > > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 67 +++++++++++++++++++ > > 1 file changed, 67 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > new file mode 100644 > > index 000000000000..0403d899e23b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > @@ -0,0 +1,67 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +# Copyright 2019 BayLibre, SAS > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Sophgo CV1800 USB PHY > > + > > +maintainers: > > + - Yao Zi <ziyao@disroot.org> > > + > > +properties: > > + compatible: > > + enum: > > + - sophgo,cv1800-usb-phy > > + > > + reg: > > + maxItems: 2 > > + > > + reg-names: > > + items: > > + - const: phy > > + - const: pin > > drop pin, cv1800 series does not support this. > > > + > > + clocks: > > + maxItems: 4 > > + > > + clock-names: > > + items: > > + - const: apb > > + - const: 125m > > + - const: 33k > > + - const: 12m > > + > > + "#phy-cells": > > + const: 0 > > + > > + dr_role: > > + enum: > > + - host > > + - device > > cv181x series have otg support. For board with OTG, > it should be properly handled. > > > + > > +required: > > + - compatible > > + - reg > > + - reg-names > > + - clocks > > + - clock-names > > + - "#phy-cells" > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/sophgo,cv1800.h> > > + usb_phy: usb-phy@3006000 { > > + compatible = "sophgo,cv1800-usb-phy"; > > + reg = <0x300600 0x60>, <0x3000048 0x4>; > > + reg-names = "phy", "pin"; > > + clocks = <&clk CLK_APB_USB>, > > + <&clk CLK_USB_125M>, > > + <&clk CLK_USB_33K>, > > + <&clk CLK_USB_12M>; > > + clock-names = "apb", "125m", "33k", "12m"; > > + #phy-cells = <0>; > > + }; > > -- > > 2.45.2 > > > > You patch is duplicated, I have sumbitted patches > month ago and still needs some time to figure out > the best topology. Phy driver belongs to syscon, > which make things kind of complex. > > https://lore.kernel.org/all/IA1PR20MB4953C1876484E149AA390DD5BB1D2@IA1PR20MB4953.namprd20.prod.outlook.com/#t I didn't check that, sorry for the noise. Best regards, Yao Zi
diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml new file mode 100644 index 000000000000..0403d899e23b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800 USB PHY + +maintainers: + - Yao Zi <ziyao@disroot.org> + +properties: + compatible: + enum: + - sophgo,cv1800-usb-phy + + reg: + maxItems: 2 + + reg-names: + items: + - const: phy + - const: pin + + clocks: + maxItems: 4 + + clock-names: + items: + - const: apb + - const: 125m + - const: 33k + - const: 12m + + "#phy-cells": + const: 0 + + dr_role: + enum: + - host + - device + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sophgo,cv1800.h> + usb_phy: usb-phy@3006000 { + compatible = "sophgo,cv1800-usb-phy"; + reg = <0x300600 0x60>, <0x3000048 0x4>; + reg-names = "phy", "pin"; + clocks = <&clk CLK_APB_USB>, + <&clk CLK_USB_125M>, + <&clk CLK_USB_33K>, + <&clk CLK_USB_12M>; + clock-names = "apb", "125m", "33k", "12m"; + #phy-cells = <0>; + };
cv1800-usb-phy driver supports USB 2.0 phys integrated in Sophgo Cv1800/SG200x SoCs. Add YAML schema for its binding. Signed-off-by: Yao Zi <ziyao@disroot.org> --- .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml