From patchwork Mon Jul 29 14:22:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13745101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E289C3DA4A for ; Mon, 29 Jul 2024 14:41:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WcmA5He6jOtEGQYpEV2Z+5ZAXMlrj5kxvFHcf1LbuOw=; b=lmqq9NcVsJE7gI cvSYhBcOaiKP2vZbzgdcxMIRHZJ1CeKLSgJizJ+japwPbTt7J0UFwvibr+0smoqTK+lI+IHndX0l/ vgkkRQcoy+xtft8PyKLgm587BW87wtKJzlmaUoiTblpfIaCxQNSkNr+Nh+uMtJDEGiG3Cx2UhWpC2 1EhQTgT6TZSan1LDIBuOTeXVF20OGhUcVV3IQht2446Ct4RuWNThp4uiQmOTg2giuExGCmdzb/smf MBb4vTPAdgssJdnVMSVLL5TPUS0sRU/I8OsMT18jeo7AOAdI/OPEVcO80qv1tGzvVsJcXlrMPFUn4 +sapzlWbC+pxbYq1j/2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRYa-0000000BgRK-247b; Mon, 29 Jul 2024 14:41:00 +0000 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sYRIB-0000000BYzV-3Vxz for linux-riscv@lists.infradead.org; Mon, 29 Jul 2024 14:24:06 +0000 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1fc6ee64512so19636165ad.0 for ; Mon, 29 Jul 2024 07:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1722263043; x=1722867843; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7lh+FxZ2Oaqm6/wZ61/7rTE9jIlv42s4WyHVAKuIs34=; b=lk6gEtDcqsTTDL1I+FWXIwQaFcM0ZNYGBflchSpmFWP34FgglJz+Us/udI+bTuVa2g olUEpn46dOjf1LiVGzlu4nMUff/XgWDIjKW1x8dXSWpRZDVX/dSt1VkqEplo6Sr2/2ip AuMm2L6gJCXoQuFhSdAiNIwqpvwaRkLN+joLRma826ooRhjlOnrWZu/od3t0jDHza2BT mf+ffoJBRV3H1UoIU1Q2fEEdFVWdX816RNqEtaQ7gJcZNUIRdHROh7iPq/bxtJ+5/tfz ag0dP/oroH3LVKh5We2exhG7zJ1VFm2aWkGBaQ9xTFLz2PGvGDFl3BapRpIAjbRQ+7qw dSHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722263043; x=1722867843; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7lh+FxZ2Oaqm6/wZ61/7rTE9jIlv42s4WyHVAKuIs34=; b=B/iGjC0mBTlvQ1OMm+C+kJfOWXjcZB/m3032D7P83vLeO8LA6DC0UV30Jkbz/+uDou mWpJA/95cSp3seOlP/ao0VO7hznqSwcXvS1NsLNH1p+zdxZByNilE7Pr0AUI+XElVqPR 2n4fMB4R+/V0j97QaHrDvKcAJMVAdiI7UDEUpUu90R7NkSdJrfRha7YZvDBglGKDkLvX 9aR9ERhyRKJxeiNNkSlW+t4R5N3kEbyfc9lcrMIrG6MsVv5bmQwHgI5yB4s7Aad1f5hO bFMVDcXPBBgK2gLkUILEWNlFJmVlgpDATPNnidvypWrCXftdL2n13p6IGAJAmsIggaCr fCdg== X-Forwarded-Encrypted: i=1; AJvYcCX5Pk2Q1ulttbYeGLG87A/HaWwMwC8YX/dGPBAG/4h0XxovY4zNQM2XpXlJI4ZXwvaUSurCOOyoJt6+54RmboeKnXZhckhp4VoH1VuNnkaZ X-Gm-Message-State: AOJu0YwQLwBjulPo4QiT+SNnz0NIWOqlQV/tAR2Yfu33rCrbVvMqgUEi nnOVcAMZtklVh9B7INpuivGgVPtFT6OnImNr5e8psj+ToDwRsVCWpvYii9tRuvU= X-Google-Smtp-Source: AGHT+IHcJJ7ZUpRxIoDgsE0liV0w2H+LBbMjTY1pRliLvaH8zHgZTiy3qiBM12OS8Q+p8MlCNj4oPg== X-Received: by 2002:a17:902:d4c6:b0:1fd:73e6:83ce with SMTP id d9443c01a7336-1ff046eca8bmr56689045ad.0.1722263043208; Mon, 29 Jul 2024 07:24:03 -0700 (PDT) Received: from sunil-pc.tail07344b.ts.net ([106.51.198.16]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fed7fa988dsm83512965ad.263.2024.07.29.07.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Jul 2024 07:24:02 -0700 (PDT) From: Sunil V L To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, linux-pci@vger.kernel.org Subject: [PATCH v7 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Date: Mon, 29 Jul 2024 19:52:34 +0530 Message-ID: <20240729142241.733357-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240729142241.733357-1-sunilvl@ventanamicro.com> References: <20240729142241.733357-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240729_072404_024057_AD19A051 X-CRM114-Status: GOOD ( 19.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Albert Ou , Haibo Xu , "Rafael J . Wysocki" , Catalin Marinas , Atish Kumar Patra , Robert Moore , Samuel Holland , Conor Dooley , Palmer Dabbelt , Drew Fustini , Anup Patel , Bjorn Helgaas , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V interrupt controllers for wired interrupts are platform devices and hence their driver will be probed late. Also, APLIC which is one such interrupt controller can not be probed early since it needs MSI services. This needs a probing order between the interrupt controller driver and the device drivers. _DEP is typically used to indicate such dependencies. However, the dependency may be already available like GSI mapping. Hence, instead of an explicit _DEP, architecture can find the implicit dependencies and add to the dependency list. For RISC-V, add the dependencies for below use cases. 1) For devices which has IRQ resource, find out the interrupt controller using GSI number map and add the dependency. 2) For PCI host bridges: a) If _PRT indicate PCI link devices, add dependency on the link device. b) If _PRT indicates GSI, find out the interrupt controller using GSI number map and add the dependency. Signed-off-by: Sunil V L --- drivers/acpi/riscv/irq.c | 155 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 155 insertions(+) diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index 9028787c73a7..cced960c2aef 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -20,6 +20,12 @@ struct riscv_ext_intc_list { struct list_head list; }; +struct acpi_irq_dep_ctx { + int rc; + unsigned int index; + acpi_handle handle; +}; + LIST_HEAD(ext_intc_list); static int irqchip_cmp_func(const void *in0, const void *in1) @@ -178,3 +184,152 @@ void __init riscv_acpi_init_gsi_mapping(void) if (acpi_table_parse_madt(ACPI_MADT_TYPE_APLIC, riscv_acpi_aplic_parse_madt, 0) > 0) acpi_get_devices("RSCV0002", riscv_acpi_create_gsi_map, NULL, NULL); } + +static acpi_handle riscv_acpi_get_gsi_handle(u32 gsi) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i; + + list_for_each(i, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi >= ext_intc_element->gsi_base && + gsi < (ext_intc_element->gsi_base + ext_intc_element->nr_irqs)) + return ext_intc_element->handle; + } + + return NULL; +} + +static acpi_status riscv_acpi_irq_get_parent(struct acpi_resource *ares, void *context) +{ + struct acpi_irq_dep_ctx *ctx = context; + struct acpi_resource_irq *irq; + struct acpi_resource_extended_irq *eirq; + + switch (ares->type) { + case ACPI_RESOURCE_TYPE_IRQ: + irq = &ares->data.irq; + if (ctx->index >= irq->interrupt_count) { + ctx->index -= irq->interrupt_count; + return AE_OK; + } + ctx->handle = riscv_acpi_get_gsi_handle(irq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: + eirq = &ares->data.extended_irq; + if (eirq->producer_consumer == ACPI_PRODUCER) + return AE_OK; + + if (ctx->index >= eirq->interrupt_count) { + ctx->index -= eirq->interrupt_count; + return AE_OK; + } + + /* Support GSIs only */ + if (eirq->resource_source.string_length) + return AE_OK; + + ctx->handle = riscv_acpi_get_gsi_handle(eirq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + } + + return AE_OK; +} + +static int riscv_acpi_irq_get_dep(acpi_handle handle, unsigned int index, acpi_handle *gsi_handle) +{ + struct acpi_irq_dep_ctx ctx = {-EINVAL, index, NULL}; + + if (!gsi_handle) + return 0; + + acpi_walk_resources(handle, METHOD_NAME__CRS, riscv_acpi_irq_get_parent, &ctx); + *gsi_handle = ctx.handle; + if (*gsi_handle) + return 1; + + return 0; +} + +static u32 riscv_acpi_add_prt_dep(acpi_handle handle) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + struct acpi_pci_routing_table *entry; + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + acpi_handle link_handle; + acpi_status status; + u32 count = 0; + + status = acpi_get_irq_routing_table(handle, &buffer); + if (ACPI_FAILURE(status)) { + acpi_handle_err(handle, "failed to get IRQ routing table\n"); + kfree(buffer.pointer); + return 0; + } + + entry = buffer.pointer; + while (entry && (entry->length > 0)) { + if (entry->source[0]) { + acpi_get_handle(handle, entry->source, &link_handle); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = link_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } else { + gsi_handle = riscv_acpi_get_gsi_handle(entry->source_index); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + entry = (struct acpi_pci_routing_table *) + ((unsigned long)entry + entry->length); + } + + kfree(buffer.pointer); + return count; +} + +static u32 riscv_acpi_add_irq_dep(acpi_handle handle) +{ + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + u32 count = 0; + int i; + + for (i = 0; + riscv_acpi_irq_get_dep(handle, i, &gsi_handle); + i++) { + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + return count; +} + +u32 arch_acpi_add_auto_dep(acpi_handle handle) +{ + if (acpi_has_method(handle, "_PRT")) + return riscv_acpi_add_prt_dep(handle); + + return riscv_acpi_add_irq_dep(handle); +}