@@ -442,30 +442,39 @@ static int plic_probe(struct platform_device *pdev)
plic_quirks = (unsigned long)id->data;
}
- priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = dev;
priv->plic_quirks = plic_quirks;
- priv->regs = devm_platform_ioremap_resource(pdev, 0);
- if (WARN_ON(!priv->regs))
- return -EIO;
+ priv->regs = of_iomap(to_of_node(dev->fwnode), 0);
+ if (WARN_ON(!priv->regs)) {
+ error = -EIO;
+ goto out_free_priv;
+ }
+ error = -EINVAL;
of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs);
if (WARN_ON(!nr_irqs))
- return -EINVAL;
+ goto out_iounmap;
priv->nr_irqs = nr_irqs;
- priv->prio_save = devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL);
+ priv->prio_save = bitmap_alloc(nr_irqs, GFP_KERNEL);
if (!priv->prio_save)
- return -ENOMEM;
+ goto out_free_priority_reg;
nr_contexts = of_irq_count(to_of_node(dev->fwnode));
if (WARN_ON(!nr_contexts))
- return -EINVAL;
+ goto out_free_priority_reg;
+
+ error = -ENOMEM;
+ priv->irqdomain = irq_domain_add_linear(to_of_node(dev->fwnode), nr_irqs + 1,
+ &plic_irqdomain_ops, priv);
+ if (WARN_ON(!priv->irqdomain))
+ goto out_free_priority_reg;
for (i = 0; i < nr_contexts; i++) {
struct of_phandle_args parent;
@@ -536,10 +545,10 @@ static int plic_probe(struct platform_device *pdev)
i * CONTEXT_ENABLE_SIZE;
handler->priv = priv;
- handler->enable_save = devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32),
- sizeof(*handler->enable_save), GFP_KERNEL);
+ handler->enable_save = kcalloc(DIV_ROUND_UP(nr_irqs, 32),
+ sizeof(*handler->enable_save), GFP_KERNEL);
if (!handler->enable_save)
- return -ENOMEM;
+ goto out_free_enable_reg;
done:
for (hwirq = 1; hwirq <= nr_irqs; hwirq++) {
plic_toggle(handler, hwirq, 0);
@@ -549,11 +558,6 @@ static int plic_probe(struct platform_device *pdev)
nr_handlers++;
}
- priv->irqdomain = irq_domain_add_linear(to_of_node(dev->fwnode), nr_irqs + 1,
- &plic_irqdomain_ops, priv);
- if (WARN_ON(!priv->irqdomain))
- return -ENOMEM;
-
/*
* We can have multiple PLIC instances so setup cpuhp state
* and register syscore operations only once after context
@@ -580,6 +584,19 @@ static int plic_probe(struct platform_device *pdev)
dev_info(dev, "mapped %d interrupts with %d handlers for %d contexts.\n",
nr_irqs, nr_handlers, nr_contexts);
return 0;
+
+out_free_enable_reg:
+ for_each_cpu(cpu, cpu_present_mask) {
+ handler = per_cpu_ptr(&plic_handlers, cpu);
+ kfree(handler->enable_save);
+ }
+out_free_priority_reg:
+ kfree(priv->prio_save);
+out_iounmap:
+ iounmap(priv->regs);
+out_free_priv:
+ kfree(priv);
+ return error;
}
static struct platform_driver plic_driver = {
This reverts commit b68d0ff529a939a118ec52f271be8cad5d99e79a. This is a prerequisite to reverting the patch converting the PLIC into a platform driver. Unfortunately this breaks booting the Allwinner D1 SoC. Fixes: 8ec99b033147 ("irqchip/sifive-plic: Convert PLIC driver into a platform driver") Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> --- drivers/irqchip/irq-sifive-plic.c | 49 +++++++++++++++++++++---------- 1 file changed, 33 insertions(+), 16 deletions(-)