| Message ID | 20240829010151.2813377-4-samuel.holland@sifive.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: Userspace pointer masking and tagged address ABI | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Wed, Aug 28, 2024 at 06:01:25PM -0700, Samuel Holland wrote: > Pointer masking is controlled via a two-bit PMM field, which appears in > various CSRs depending on which extensions are implemented. Smmpm adds > the field to mseccfg; Smnpm adds the field to menvcfg; Ssnpm adds the > field to senvcfg. If the H extension is implemented, Ssnpm also defines > henvcfg.PMM and hstatus.HUPMM. > > Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Charlie Jenkins <charlie@rivosinc.com> > --- > > (no changes since v3) > > Changes in v3: > - Use shifts instead of large numbers in ENVCFG_PMM* macro definitions > > Changes in v2: > - Use the correct name for the hstatus.HUPMM field > > arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > index 25966995da04..fe5d4eb9adea 100644 > --- a/arch/riscv/include/asm/csr.h > +++ b/arch/riscv/include/asm/csr.h > @@ -119,6 +119,10 @@ > > /* HSTATUS flags */ > #ifdef CONFIG_64BIT > +#define HSTATUS_HUPMM _AC(0x3000000000000, UL) > +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL) > +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL) > +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL) > #define HSTATUS_VSXL _AC(0x300000000, UL) > #define HSTATUS_VSXL_SHIFT 32 > #endif > @@ -195,6 +199,10 @@ > /* xENVCFG flags */ > #define ENVCFG_STCE (_AC(1, ULL) << 63) > #define ENVCFG_PBMTE (_AC(1, ULL) << 62) > +#define ENVCFG_PMM (_AC(0x3, ULL) << 32) > +#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32) > +#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32) > +#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32) > #define ENVCFG_CBZE (_AC(1, UL) << 7) > #define ENVCFG_CBCFE (_AC(1, UL) << 6) > #define ENVCFG_CBIE_SHIFT 4 > @@ -216,6 +224,12 @@ > #define SMSTATEEN0_SSTATEEN0_SHIFT 63 > #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) > > +/* mseccfg bits */ > +#define MSECCFG_PMM ENVCFG_PMM > +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0 > +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7 > +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16 > + > /* symbolic CSR names: */ > #define CSR_CYCLE 0xc00 > #define CSR_TIME 0xc01 > @@ -382,6 +396,8 @@ > #define CSR_MIP 0x344 > #define CSR_PMPCFG0 0x3a0 > #define CSR_PMPADDR0 0x3b0 > +#define CSR_MSECCFG 0x747 > +#define CSR_MSECCFGH 0x757 > #define CSR_MVENDORID 0xf11 > #define CSR_MARCHID 0xf12 > #define CSR_MIMPID 0xf13 > -- > 2.45.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 25966995da04..fe5d4eb9adea 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -119,6 +119,10 @@ /* HSTATUS flags */ #ifdef CONFIG_64BIT +#define HSTATUS_HUPMM _AC(0x3000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_0 _AC(0x0000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_7 _AC(0x2000000000000, UL) +#define HSTATUS_HUPMM_PMLEN_16 _AC(0x3000000000000, UL) #define HSTATUS_VSXL _AC(0x300000000, UL) #define HSTATUS_VSXL_SHIFT 32 #endif @@ -195,6 +199,10 @@ /* xENVCFG flags */ #define ENVCFG_STCE (_AC(1, ULL) << 63) #define ENVCFG_PBMTE (_AC(1, ULL) << 62) +#define ENVCFG_PMM (_AC(0x3, ULL) << 32) +#define ENVCFG_PMM_PMLEN_0 (_AC(0x0, ULL) << 32) +#define ENVCFG_PMM_PMLEN_7 (_AC(0x2, ULL) << 32) +#define ENVCFG_PMM_PMLEN_16 (_AC(0x3, ULL) << 32) #define ENVCFG_CBZE (_AC(1, UL) << 7) #define ENVCFG_CBCFE (_AC(1, UL) << 6) #define ENVCFG_CBIE_SHIFT 4 @@ -216,6 +224,12 @@ #define SMSTATEEN0_SSTATEEN0_SHIFT 63 #define SMSTATEEN0_SSTATEEN0 (_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT) +/* mseccfg bits */ +#define MSECCFG_PMM ENVCFG_PMM +#define MSECCFG_PMM_PMLEN_0 ENVCFG_PMM_PMLEN_0 +#define MSECCFG_PMM_PMLEN_7 ENVCFG_PMM_PMLEN_7 +#define MSECCFG_PMM_PMLEN_16 ENVCFG_PMM_PMLEN_16 + /* symbolic CSR names: */ #define CSR_CYCLE 0xc00 #define CSR_TIME 0xc01 @@ -382,6 +396,8 @@ #define CSR_MIP 0x344 #define CSR_PMPCFG0 0x3a0 #define CSR_PMPADDR0 0x3b0 +#define CSR_MSECCFG 0x747 +#define CSR_MSECCFGH 0x757 #define CSR_MVENDORID 0xf11 #define CSR_MARCHID 0xf12 #define CSR_MIMPID 0xf13
Pointer masking is controlled via a two-bit PMM field, which appears in various CSRs depending on which extensions are implemented. Smmpm adds the field to mseccfg; Smnpm adds the field to menvcfg; Ssnpm adds the field to senvcfg. If the H extension is implemented, Ssnpm also defines henvcfg.PMM and hstatus.HUPMM. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> --- (no changes since v3) Changes in v3: - Use shifts instead of large numbers in ENVCFG_PMM* macro definitions Changes in v2: - Use the correct name for the hstatus.HUPMM field arch/riscv/include/asm/csr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)