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drivers/perf: riscv: Align errno for unsupported perf type in pmu_sbi_event_map

Message ID 20240829094922.865638-1-pulehui@huaweicloud.com (mailing list archive)
State New
Headers show
Series drivers/perf: riscv: Align errno for unsupported perf type in pmu_sbi_event_map | expand

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conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-1-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
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Commit Message

Pu Lehui Aug. 29, 2024, 9:49 a.m. UTC
From: Pu Lehui <pulehui@huawei.com>

RISC-V perf driver does not yet support PERF_TYPE_BREAKPOINT. It would
be more appropriate to return -EOPNOTSUPP or -ENOENT for this type in
pmu_sbi_event_map. Considering that other implementations return -ENOENT
for unsupported perf types, let's synchronize this behavior. Due to this
reason, a riscv bpf testcases perf_skip fail.

Signed-off-by: Pu Lehui <pulehui@huawei.com>
---
 drivers/perf/riscv_pmu_sbi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Atish Kumar Patra Aug. 30, 2024, 5:24 p.m. UTC | #1
On 8/29/24 2:49 AM, Pu Lehui wrote:
> From: Pu Lehui <pulehui@huawei.com>
> 
> RISC-V perf driver does not yet support PERF_TYPE_BREAKPOINT. It would
> be more appropriate to return -EOPNOTSUPP or -ENOENT for this type in
> pmu_sbi_event_map. Considering that other implementations return -ENOENT
> for unsupported perf types, let's synchronize this behavior. Due to this
> reason, a riscv bpf testcases perf_skip fail.
> 
> Signed-off-by: Pu Lehui <pulehui@huawei.com>
> ---
>   drivers/perf/riscv_pmu_sbi.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 31a17a56eb3b..cdcb328f09b6 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -543,7 +543,7 @@ static int pmu_sbi_event_map(struct perf_event *event, u64 *econfig)
>   		}
>   		break;
>   	default:
> -		ret = -EINVAL;
> +		ret = -ENOENT;
>   		break;
>   	}
>   

Thanks for the fix. There are few more places where the error codes can 
be aligned.

1. We return EOPNOTSUPP for legacy driver.
https://elixir.bootlin.com/linux/v6.11-rc5/source/drivers/perf/riscv_pmu_legacy.c#L31

2. We should return ENOENT for invalid event mapping as well.

https://elixir.bootlin.com/linux/v6.11-rc5/source/drivers/perf/riscv_pmu_sbi.c#L312
Pu Lehui Aug. 31, 2024, 2:49 a.m. UTC | #2
On 2024/8/31 1:24, Atish Patra wrote:
> On 8/29/24 2:49 AM, Pu Lehui wrote:
>> From: Pu Lehui <pulehui@huawei.com>
>>
>> RISC-V perf driver does not yet support PERF_TYPE_BREAKPOINT. It would
>> be more appropriate to return -EOPNOTSUPP or -ENOENT for this type in
>> pmu_sbi_event_map. Considering that other implementations return -ENOENT
>> for unsupported perf types, let's synchronize this behavior. Due to this
>> reason, a riscv bpf testcases perf_skip fail.
>>
>> Signed-off-by: Pu Lehui <pulehui@huawei.com>
>> ---
>>   drivers/perf/riscv_pmu_sbi.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
>> index 31a17a56eb3b..cdcb328f09b6 100644
>> --- a/drivers/perf/riscv_pmu_sbi.c
>> +++ b/drivers/perf/riscv_pmu_sbi.c
>> @@ -543,7 +543,7 @@ static int pmu_sbi_event_map(struct perf_event 
>> *event, u64 *econfig)
>>           }
>>           break;
>>       default:
>> -        ret = -EINVAL;
>> +        ret = -ENOENT;
>>           break;
>>       }
> 
> Thanks for the fix. There are few more places where the error codes can 
> be aligned.
> 
> 1. We return EOPNOTSUPP for legacy driver.
> https://elixir.bootlin.com/linux/v6.11-rc5/source/drivers/perf/riscv_pmu_legacy.c#L31
> 
> 2. We should return ENOENT for invalid event mapping as well.
> 
> https://elixir.bootlin.com/linux/v6.11-rc5/source/drivers/perf/riscv_pmu_sbi.c#L312

Thanks Atish, I will check for that and attach that for the next version.
diff mbox series

Patch

diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 31a17a56eb3b..cdcb328f09b6 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -543,7 +543,7 @@  static int pmu_sbi_event_map(struct perf_event *event, u64 *econfig)
 		}
 		break;
 	default:
-		ret = -EINVAL;
+		ret = -ENOENT;
 		break;
 	}