From patchwork Fri Aug 30 01:10:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 13784095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F06D3CA0ECC for ; Fri, 30 Aug 2024 01:18:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rx7bCG0weWkfBATReUcyrQoT62//mIc0+/JfnfhCg60=; b=N8UuLUR93l8uw6 p+UUOJcWeEpLXu3MO3sH4CUIcWNoMO0upIdilT2LuU3V4s8aFViqwpE61qbis2fpdRr0dXfuTFQ2b HBIeigsVv0lPPQdWgIKATl/AxEw5tBKDflXNbrI3zTz6G0oqnOEingTRHdzaWuJasUog1iZpnYWAq ibR8myERWO5LQrZay1R6ismDQNvo435WGAeCm1zBAsy9a4Vi9OX/i/hBx0LfGxmE2pgP7AuCF9RNg 2iURb2iQrrmB9I5ANOWCB26MIC9NNOaM5eXoIIs913Jz9O7Hjuz244/yNBTDH4zdVqIdqC0s1CpPG 6C7nnPtu93c2qp4A1QEQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjqGv-00000004GW9-1ou5; Fri, 30 Aug 2024 01:17:53 +0000 Received: from smtp21.cstnet.cn ([159.226.251.21] helo=cstnet.cn) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjqGr-00000004GUG-1JlQ for linux-riscv@lists.infradead.org; Fri, 30 Aug 2024 01:17:51 +0000 Received: from ubt.. (unknown [210.73.53.31]) by APP-01 (Coremail) with SMTP id qwCowAC3vUmsHdFmIwaXCw--.62105S3; Fri, 30 Aug 2024 09:17:34 +0800 (CST) From: Chunyan Zhang To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Morton , Alexandre Ghiti Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Chunyan Zhang Subject: [RESEND PATCH V4 1/3] riscv: mm: Prepare for reusing PTE RSW bit(9) Date: Fri, 30 Aug 2024 09:10:59 +0800 Message-Id: <20240830011101.3189522-2-zhangchunyan@iscas.ac.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240830011101.3189522-1-zhangchunyan@iscas.ac.cn> References: <20240830011101.3189522-1-zhangchunyan@iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: qwCowAC3vUmsHdFmIwaXCw--.62105S3 X-Coremail-Antispam: 1UD129KBjvJXoW7tw4UKF47uw1UGr13AFy5urg_yoW8AryDpF s0kr9YkFWrCrySkay2yFnFgr4UAa98K3sIgry8ur4UJas8t3yUZ39xKw17Xay8Xa1vvF93 GFWvg345ury3Jw7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUPYb7Iv0xC_Zr1lb4IE77IF4wAFF20E14v26ryj6rWUM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28IrcIa0xkI8VA2jI 8067AKxVWUGwA2048vs2IY020Ec7CjxVAFwI0_JFI_Gr1l8cAvFVAK0II2c7xJM28CjxkF 64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVW8JVW5JwA2z4x0Y4vE2Ix0cI8IcV CY1x0267AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE14v26r4j6F4UM28EF7xvwVC2z280aVCY 1x0267AKxVW8JVW8Jr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I 8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCF s4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY1x0262kKe7AKxVWUAVWUtwCY02Avz4 vE14v_KwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E 14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIx kGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAF wI0_Gr0_Cr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r1j6r 4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07jz9akU UUUU= X-Originating-IP: [210.73.53.31] X-CM-SenderInfo: x2kd0wxfkx051dq6x2xfdvhtffof0/1tbiDAYFB2bRD2YmYQAAsR X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240829_181749_746659_50A43465 X-CRM114-Status: GOOD ( 10.75 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The PTE bit(9) on RISC-V is reserved for software, it is used by DEVMAP now which has to be disabled if we want to use bit(9) for other features, since there's no more free PTE bit on RISC-V now. So to make ARCH_HAS_PTE_DEVMAP selectable, this patch uses it as the build condition of devmap definitions. Signed-off-by: Chunyan Zhang --- arch/riscv/include/asm/pgtable-64.h | 2 +- arch/riscv/include/asm/pgtable-bits.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index 0897dd99ab8d..babb8d2b0f0b 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -398,7 +398,7 @@ static inline struct page *pgd_page(pgd_t pgd) #define p4d_offset p4d_offset p4d_t *p4d_offset(pgd_t *pgd, unsigned long address); -#ifdef CONFIG_TRANSPARENT_HUGEPAGE +#if defined(CONFIG_TRANSPARENT_HUGEPAGE) && defined(CONFIG_ARCH_HAS_PTE_DEVMAP) static inline int pte_devmap(pte_t pte); static inline pte_t pmd_pte(pmd_t pmd); diff --git a/arch/riscv/include/asm/pgtable-bits.h b/arch/riscv/include/asm/pgtable-bits.h index a8f5205cea54..5bcc73430829 100644 --- a/arch/riscv/include/asm/pgtable-bits.h +++ b/arch/riscv/include/asm/pgtable-bits.h @@ -19,7 +19,13 @@ #define _PAGE_SOFT (3 << 8) /* Reserved for software */ #define _PAGE_SPECIAL (1 << 8) /* RSW: 0x1 */ + +#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP #define _PAGE_DEVMAP (1 << 9) /* RSW, devmap */ +#else +#define _PAGE_DEVMAP 0 +#endif /* CONFIG_ARCH_HAS_PTE_DEVMAP */ + #define _PAGE_TABLE _PAGE_PRESENT /*