Message ID | 20241004112027.2639252-1-ben.dooks@codethink.co.uk (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | riscv: insn: add RV_EXTRACT_FUNCT3() | expand |
diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h index 09fde95a5e8f..c67f44ff2066 100644 --- a/arch/riscv/include/asm/insn.h +++ b/arch/riscv/include/asm/insn.h @@ -299,6 +299,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) ({typeof(x) x_ = (x); \ (RV_X(x_, RVG_RD_OPOFF, RVG_RD_MASK)); }) +#define RV_EXTRACT_FUNCT3(x) \ + ({typeof(x) x_ = (x); \ + (RV_X(x_, RV_INSN_FUNCT3_OPOFF, RV_INSN_FUNCT3_MASK)); }) + #define RV_EXTRACT_UTYPE_IMM(x) \ ({typeof(x) x_ = (x); \ (RV_X(x_, RV_U_IMM_31_12_OPOFF, RV_U_IMM_31_12_MASK)); })
Add extraction for the func3 field of most instructions for use with anyone who needs it. Note, added this for decoding of CSR accesses for work we did looking at the RDCYCLE v RDTIME calls. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- arch/riscv/include/asm/insn.h | 4 ++++ 1 file changed, 4 insertions(+)