From patchwork Thu Oct 17 00:25:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Rogers X-Patchwork-Id: 13839302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CAF79D2F7DF for ; Thu, 17 Oct 2024 02:01:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:To:From:Subject:References:Mime-Version :Message-Id:In-Reply-To:Date:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=LRQpnVwm06Ogy5QC3MzXUGyjd84PwQNyd1SATqWwETo=; b=VNMdKeS1GmXkRS JIB8cl3L9ntXEKRU1ejR8avZJfrEULDO/Sa01VmNxU4bfZQVr58cPzIBhkvD2TJADtg239W3w074/ T1GC94UrIg5DRwnjjx966yrCzjTNHDOxky45uQ4HymuHuFZrvHlSQigGsfHo4PJ/6bqT/dc13uxH2 XL/U8CB9xPpi2iBfIwTqOZmhNNNvGrXyYF4jJ1Kc40kwjcOp82QitCwocMBSm/ufm7QELLHye2Qa7 lMTF/0uK4O6R1nVQ9lKh34tG/vO6wF43mBWvHqwQXcL9eUssKFv8szpfsmtGnevsgw3mTpYtIcoHy Xj7nbs2I6qXe1gXQfiSA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1Fox-0000000DVLM-13IB; Thu, 17 Oct 2024 02:00:59 +0000 Received: from mail-yb1-xb49.google.com ([2607:f8b0:4864:20::b49]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1EKq-0000000DKFD-4A2O for linux-riscv@lists.infradead.org; Thu, 17 Oct 2024 00:25:50 +0000 Received: by mail-yb1-xb49.google.com with SMTP id 3f1490d57ef6-e29135d1d0cso752588276.1 for ; Wed, 16 Oct 2024 17:25:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1729124747; x=1729729547; darn=lists.infradead.org; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :from:to:cc:subject:date:message-id:reply-to; bh=dslSAnjJv4+bi+jw9vLrzNQpv+NsibScELb0cgIuYNw=; b=OoDur39ygJfwjLvRJGQW4ah5Imn0bTgCQy0NSv69eeSyrXqLtA6M1XCSyNXPka+IYA pEENTe/IBIBndVbqQL/vqQeYZkffuqk22cfEFpz5L+hjf7nyKLYhH9BeRJwAsb1XVxO9 uJQYbss5HBzipyerCkkKyvSHHIh6CXc4AfCEiXEg8FvAGh/f1Lzv6it5uh6ktqjCWoTm RgkhzQ6dJEPF1Gl/3gM5onH0Kt2J7PJ08fi+FNIXbLnFj8tmf6OpWD9Y81zUN0QTYkUO CeIDX1rHbSgXDmGfqX6bxKg93bsu1/b3zPw2XBv8Dl+RO5ZamfkyoJl4lVHgvmuaEKNX npPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729124747; x=1729729547; h=to:from:subject:references:mime-version:message-id:in-reply-to:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=dslSAnjJv4+bi+jw9vLrzNQpv+NsibScELb0cgIuYNw=; b=CjZIpFsS2GJ8rhqpM3GWFwVx0sqtEt97UzhjtUTb1XEo1dAEkQ1RNDERAsYdUKVXvw rCy9H+SIT4O+767quwQzYStrTBWVNDhXOaU5dzctotPDkh/GBy26eLCJmvSx0ePzXkV/ 2+VaXPwom3Chdkv2IaQ685FF2fONeFQmdWKaQBD5VI4IYi5ZHWVGm+P8YBDeV7WVY/mo bThyEoDGhl1LXqmV2ySudKTsV/Y5YxzgLL+B1gxxE2lqF5PIzSnEDLWJTuIGtGDmjCSx t+LE//SR+rH52dy3BSRnpr/50WOwgtCYe0fNVAv4mG5kP7ge2OicmxMFwQavSA7z/fAg Mj9g== X-Forwarded-Encrypted: i=1; AJvYcCU/1GjyokInqXw0WTO/UQRNm4yQpqFY3BEF0rQigGMl1mksuSvLkvyvA3b77Z60mMFYge4KT8Gj5wD6pA==@lists.infradead.org X-Gm-Message-State: AOJu0YzGkn0+Dj9rWXcvdeyGZU20J81a1CivCDN6I2K/YA3HP9pmN+AH BtxH/XFAUtXqAobSbrVsNvTRiFykI9kuG+UWlzZ12k92Y/19v22ObcqFL79t2bZYPC2Gkt/ND1D sgwDU5A== X-Google-Smtp-Source: AGHT+IGX+xXJQajfsUo21pSiHMMPg3ixWu0rLrNuUSYK4yFL/4dyDAI12MBtvoLY2sM/xxmxtpwsQUR20SGF X-Received: from irogers.svl.corp.google.com ([2620:15c:2c5:11:a00a:f237:9bc0:79c]) (user=irogers job=sendgmr) by 2002:a5b:505:0:b0:e28:8f00:896a with SMTP id 3f1490d57ef6-e2978594c30mr3203276.8.1729124747028; Wed, 16 Oct 2024 17:25:47 -0700 (PDT) Date: Wed, 16 Oct 2024 17:25:08 -0700 In-Reply-To: <20241017002520.59124-1-irogers@google.com> Message-Id: <20241017002520.59124-9-irogers@google.com> Mime-Version: 1.0 References: <20241017002520.59124-1-irogers@google.com> X-Mailer: git-send-email 2.47.0.105.g07ac214952-goog Subject: [PATCH v3 08/20] perf arm64: Remove dwarf-regs.c From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Kan Liang , John Garry , Will Deacon , James Clark , Mike Leach , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Nick Terrell , "Masami Hiramatsu (Google)" , Changbin Du , Guilherme Amadio , Yang Jihong , Aditya Gupta , Athira Rajeev , Masahiro Yamada , Bibo Mao , Huacai Chen , Kajol Jain , Atish Patra , Shenlin Liang , Anup Patel , Oliver Upton , "Steinar H. Gunderson" , "Dr. David Alan Gilbert" , Chen Pei , Dima Kogan , Przemek Kitszel , "David S. Miller" , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241016_172549_053524_9E51388E X-CRM114-Status: GOOD ( 19.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The file just provides the function get_arch_regstr, however, if in the only caller get_dwarf_regstr EM_HOST is used for the EM_NONE case the function can never be called. So remove as dead code. Tidy up the EM_NONE cases for arm64 in dwarf-regs.c. Signed-off-by: Ian Rogers --- tools/perf/arch/arm64/util/Build | 1 - tools/perf/arch/arm64/util/dwarf-regs.c | 80 ------------------------- tools/perf/util/dwarf-regs.c | 4 +- tools/perf/util/include/dwarf-regs.h | 2 +- 4 files changed, 3 insertions(+), 84 deletions(-) delete mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build index 4387a6d6a6c3..a74521b79eaa 100644 --- a/tools/perf/arch/arm64/util/Build +++ b/tools/perf/arch/arm64/util/Build @@ -4,7 +4,6 @@ perf-util-y += perf_regs.o perf-util-y += tsc.o perf-util-y += pmu.o perf-util-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o -perf-util-$(CONFIG_LIBDW) += dwarf-regs.o perf-util-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm64/util/dwarf-regs.c deleted file mode 100644 index 343a62fa4199..000000000000 --- a/tools/perf/arch/arm64/util/dwarf-regs.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Mapping of DWARF debug register numbers into register names. - * - * Copyright (C) 2010 Will Deacon, ARM Ltd. - */ - -#include -#include -#include -#include -#include - -struct regs_dwarfnum { - const char *name; - unsigned int dwarfnum; -}; - -#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num} -#define GPR_DWARFNUM_NAME(num) \ - {.name = __stringify(%x##num), .dwarfnum = num} -#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0} - -/* - * Reference: - * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadwarf64.pdf - */ -static const struct regs_dwarfnum regdwarfnum_table[] = { - GPR_DWARFNUM_NAME(0), - GPR_DWARFNUM_NAME(1), - GPR_DWARFNUM_NAME(2), - GPR_DWARFNUM_NAME(3), - GPR_DWARFNUM_NAME(4), - GPR_DWARFNUM_NAME(5), - GPR_DWARFNUM_NAME(6), - GPR_DWARFNUM_NAME(7), - GPR_DWARFNUM_NAME(8), - GPR_DWARFNUM_NAME(9), - GPR_DWARFNUM_NAME(10), - GPR_DWARFNUM_NAME(11), - GPR_DWARFNUM_NAME(12), - GPR_DWARFNUM_NAME(13), - GPR_DWARFNUM_NAME(14), - GPR_DWARFNUM_NAME(15), - GPR_DWARFNUM_NAME(16), - GPR_DWARFNUM_NAME(17), - GPR_DWARFNUM_NAME(18), - GPR_DWARFNUM_NAME(19), - GPR_DWARFNUM_NAME(20), - GPR_DWARFNUM_NAME(21), - GPR_DWARFNUM_NAME(22), - GPR_DWARFNUM_NAME(23), - GPR_DWARFNUM_NAME(24), - GPR_DWARFNUM_NAME(25), - GPR_DWARFNUM_NAME(26), - GPR_DWARFNUM_NAME(27), - GPR_DWARFNUM_NAME(28), - GPR_DWARFNUM_NAME(29), - REG_DWARFNUM_NAME("%lr", 30), - REG_DWARFNUM_NAME("%sp", 31), - REG_DWARFNUM_END, -}; - -/** - * get_arch_regstr() - lookup register name from it's DWARF register number - * @n: the DWARF register number - * - * get_arch_regstr() returns the name of the register in struct - * regdwarfnum_table from it's DWARF register number. If the register is not - * found in the table, this returns NULL; - */ -const char *get_arch_regstr(unsigned int n) -{ - const struct regs_dwarfnum *roff; - - for (roff = regdwarfnum_table; roff->name != NULL; roff++) - if (roff->dwarfnum == n) - return roff->name; - return NULL; -} diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c index eac99a246737..18e916c8e993 100644 --- a/tools/perf/util/dwarf-regs.c +++ b/tools/perf/util/dwarf-regs.c @@ -32,14 +32,14 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int flags __maybe_unused) { -#if EM_HOST == EM_X86_64 || EM_HOST == EM_386 +#if EM_HOST == EM_X86_64 || EM_HOST == EM_386 || EM_HOST == EM_AARCH64 if (machine == EM_NONE) { /* Generic arch - use host arch */ machine = EM_HOST; } #endif switch (machine) { -#if EM_HOST != EM_X86_64 && EM_HOST != EM_386 +#if EM_HOST != EM_X86_64 && EM_HOST != EM_386 && EM_HOST != EM_AARCH64 case EM_NONE: /* Generic arch - use host arch */ return get_arch_regstr(n); #endif diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include/dwarf-regs.h index 062623aefd5a..e640657f69c8 100644 --- a/tools/perf/util/include/dwarf-regs.h +++ b/tools/perf/util/include/dwarf-regs.h @@ -79,7 +79,7 @@ #define DWARF_REG_FB 0xd3affb /* random number */ #ifdef HAVE_LIBDW_SUPPORT -#if !defined(__x86_64__) && !defined(__i386__) +#if !defined(__x86_64__) && !defined(__i386__) && !defined(__aarch64__) const char *get_arch_regstr(unsigned int n); #endif