| Message ID | 20241126073836.17208-2-e@freeshell.de (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | riscv: dts: starfive: jh7110-pine64-star64: enable usb0 host function | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
Emil, On Mon, Nov 25, 2024 at 11:38:17PM -0800, E Shattow wrote: > Pine64 Star64 set JH7110 on-chip USB host mode and vbus pin assignment > Looks like the same thing here, so same thing here :) Thanks, Conor. > Signed-off-by: E Shattow <e@freeshell.de> > --- > .../boot/dts/starfive/jh7110-pine64-star64.dts | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > index fe4a490ecc61..b764d4d92fd9 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > @@ -80,7 +80,23 @@ &spi0 { > status = "okay"; > }; > > +&sysgpio { > + usb0_pins: usb0-0 { > + vbus-pins { > + pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, > + GPOEN_ENABLE, > + GPI_NONE)>; > + bias-disable; > + input-disable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + }; > +}; > + > &usb0 { > - dr_mode = "peripheral"; > + dr_mode = "host"; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb0_pins>; > status = "okay"; > }; > -- > 2.45.2 >
E Shattow wrote: > Pine64 Star64 set JH7110 on-chip USB host mode and vbus pin assignment Here I'd like it explained that the Star64 board routes 1 of the 4 USB-A ports to USB0 on the SoC rather than to the USB 3.0 <-> PCIe chip. (Confusing for users that 1 of the 4 similar ports only does USB 2.0, but that's too late to change and not relevant here) With that fixed: Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > > Signed-off-by: E Shattow <e@freeshell.de> > --- > .../boot/dts/starfive/jh7110-pine64-star64.dts | 18 +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > index fe4a490ecc61..b764d4d92fd9 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts > @@ -80,7 +80,23 @@ &spi0 { > status = "okay"; > }; > > +&sysgpio { > + usb0_pins: usb0-0 { > + vbus-pins { > + pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, > + GPOEN_ENABLE, > + GPI_NONE)>; > + bias-disable; > + input-disable; > + input-schmitt-disable; > + slew-rate = <0>; > + }; > + }; > +}; > + > &usb0 { > - dr_mode = "peripheral"; > + dr_mode = "host"; > + pinctrl-names = "default"; > + pinctrl-0 = <&usb0_pins>; > status = "okay"; > }; > -- > 2.45.2 >
On 11/27/24 05:23, Emil Renner Berthing wrote: > E Shattow wrote: >> Pine64 Star64 set JH7110 on-chip USB host mode and vbus pin assignment > Here I'd like it explained that the Star64 board routes 1 of the 4 USB-A ports > to USB0 on the SoC rather than to the USB 3.0 <-> PCIe chip. > > (Confusing for users that 1 of the 4 similar ports only does USB 2.0, but > that's too late to change and not relevant here) > > With that fixed: > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> There is no (VL805) USB 3.0 <-> PCIe chip on Star64; All 4 USB-A ports route to USB0 of the SoC. What does not exist I did not write about in the cover letter. I will expand the description in the commit message. Thank you! -E >> Signed-off-by: E Shattow <e@freeshell.de> >> --- >> .../boot/dts/starfive/jh7110-pine64-star64.dts | 18 +++++++++++++++++- >> 1 file changed, 17 insertions(+), 1 deletion(-) >> >> diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts >> index fe4a490ecc61..b764d4d92fd9 100644 >> --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts >> +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts >> @@ -80,7 +80,23 @@ &spi0 { >> status = "okay"; >> }; >> >> +&sysgpio { >> + usb0_pins: usb0-0 { >> + vbus-pins { >> + pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, >> + GPOEN_ENABLE, >> + GPI_NONE)>; >> + bias-disable; >> + input-disable; >> + input-schmitt-disable; >> + slew-rate = <0>; >> + }; >> + }; >> +}; >> + >> &usb0 { >> - dr_mode = "peripheral"; >> + dr_mode = "host"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&usb0_pins>; >> status = "okay"; >> }; >> -- >> 2.45.2 >>
diff --git a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts index fe4a490ecc61..b764d4d92fd9 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-pine64-star64.dts @@ -80,7 +80,23 @@ &spi0 { status = "okay"; }; +&sysgpio { + usb0_pins: usb0-0 { + vbus-pins { + pinmux = <GPIOMUX(25, GPOUT_SYS_USB_DRIVE_VBUS, + GPOEN_ENABLE, + GPI_NONE)>; + bias-disable; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + }; +}; + &usb0 { - dr_mode = "peripheral"; + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usb0_pins>; status = "okay"; };
Pine64 Star64 set JH7110 on-chip USB host mode and vbus pin assignment Signed-off-by: E Shattow <e@freeshell.de> --- .../boot/dts/starfive/jh7110-pine64-star64.dts | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)