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2024 13:42:03 +0000 (GMT) From: Michal Wilczynski To: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, jassisinghbrar@gmail.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, frank.binns@imgtec.com, matt.coster@imgtec.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, ulf.hansson@linaro.org, jszhang@kernel.org, m.szyprowski@samsung.com Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org, Michal Wilczynski Subject: [RFC PATCH v1 12/14] riscv: dts: Add Video Output clock and syscon regmap nodes Date: Tue, 3 Dec 2024 14:41:35 +0100 Message-Id: <20241203134137.2114847-13-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: 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CMS-TYPE: 201P X-CMS-RootMailID: 20241203134204eucas1p1d0df90a265637542f0652fd407dc7989 References: <20241203134137.2114847-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241203_054207_172751_53A39AB2 X-CRM114-Status: GOOD ( 10.50 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The address space controlling the Video Output (VO) subsystem clocks also contains control registers for GPU resets. To properly synchronize access to this shared address space, create a syscon Device Tree node for the VO registers and reference it in the clock controller node. This change ensures coordinated access to the VO registers between the clock controller and other drivers, preventing conflicts and maintaining system stability. Signed-off-by: Michal Wilczynski --- arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index dc2d554b4a71..39d39059160d 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -489,6 +489,18 @@ clk: clock-controller@ffef010000 { #clock-cells = <1>; }; + vosys_clk: clock-controller { + compatible = "thead,th1520-clk-vo"; + thead,vosys-regmap = <&vosys_reg>; + #clock-cells = <1>; + }; + + vosys_reg: vosys@ffef528000 { + compatible = "thead,th1520-vosys", "syscon"; + reg = <0xff 0xef528000 0x0 0x1000>; + status = "okay"; + }; + dmac0: dma-controller@ffefc00000 { compatible = "snps,axi-dma-1.01a"; reg = <0xff 0xefc00000 0x0 0x1000>;